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RTQ2159-QA Datasheet(PDF) 21 Page - Richtek Technology Corporation |
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RTQ2159-QA Datasheet(HTML) 21 Page - Richtek Technology Corporation |
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21 / 29 page ![]() RTQ2159-QA Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DSQ2159-QA-01 March 2021 www.richtek.com 21 Table 9. DCDC_SET Address : 0x05 Description : current limit, thermal shutdown threshold, PG enable delay time, VID Bits Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Name Reserved OTSET PGDSET Reserved Reset Value 0 0 1 0 0 1 0 0 Read/Write R R R R/W R/W R/W R R Bits Name Description 7 : 6 Reserved Reserved bit 5 : 4 OTSET OTSET[5:4] = 00b : no OT OTSET[5:4] = 01b : 170 C OTSET[5:4] = 10b : 175°C (default) OTSET[5:4] = 11b : 180°C 3 : 2 PGDSET PGDSET[3:2] = 00b : PG enable delay time = 0 s PGDSET[3:2] = 01b : PG enable delay time = 10 s (default) PGDSET[3:2] = 10b : PG enable delay time = 20 s PGDSET[3:2] = 11b : PG enable delay time = 40 s 1 : 0 Reserved Reserved bit |
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