VCTA25201B-R33MS6 datasheet(22/50 Pages) RICHTEK

22 / 50 page

RTQ2134-QA

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DSQ2134-QA-02

May

2022



Place high frequency decoupling capacitor as close

as possible to the IC to reduce the loop impedance

and minimize switch node ringing.



Place multiple vias under the device near PVIN and

PGND and close to input capacitors to reduce

parasitic

inductance

and

improve

thermal

performance. To keep thermal resistance low,

extend the ground plane as much as possible, and

add twenty thermal vias under and near the

RTQ2134 to additional ground planes within the

circuit board and on the bottom side.



The high frequency switching nodes, LX, should be

as small as possible. Keep analog components

away from the LX node.



Reduce the area size of the LX exposed copper to

reduce the electrically coupling from this voltage.



Connect the feedback sense network behind via of

output capacitor.



Connect all analog grounds to common node and

then connect the common node to the power ground

with a single point.

Figure 9 and Figure 10 show the layout example which

includes one two phase converter for Core and one

single phase converter for Memory application.

CIN4

CIN1

PVIN4

LX4

PVIN1

LX1

CVIO

CIN2

CIN3

COUT2_0

COUT3_0

COUT3_1

PAD

PVIN2

LX2

PGND

PVIN3

LX3

COUT2_1

COUT4_1

COUT1_1

COUT4_0

CAVIN

COUT1_0

PGND

Connect to PGND in

second layer with

single node.

Keep feedback sense

trace away from noise

trace to reduce coupling.

AVIN_FILT capacitor

must be placed as close

to IC as possible

Add vias on exposed pad

for thermal dissipation and

current carrying capacity

Input capacitors must be

placed as close to IC

VIN-GND as possible

Connect to PGND in

second layer with

single node.

VOUT1

VOUT2

VOUT3

Figure 9

. Layout Guideline for 2 + 1 + 1 Application

VCTA25201B-R33MS6 Datasheet(PDF) 22 Page - Richtek Technology Corporation

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