ES9822PRO datasheet(71/126 Pages) ESS

71 / 126 page

0.3

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM

ES9822 PRO Product Datasheet

Bits

[7:4]

[3]

[2]

[1]

[0]

Default

4'd0

1'b0

Bits

Mnemonic

Description

[7:4]

ADC_INT_SEL_CH1A

ADC Integrator Control

•

Program to 4'b1011 for optimum performance

[3]

ADC_EN_FB_CH1A

Enable ADC 1A feedback path, active high

•

1'b0: Disabled (default)

•

1'b1: Enabled

[2]

RESERVED

[1]

ADC_EN_INT_CH1A

Enable for INT for Channel 1A. Default is 0, INT is not

enabled.

•

Set to 1'b1 to enable.

[0]

ADC_EN_CH1A

Enable for Comparator and logic for Channel 1A. Default is 0,

Comparator and logic are not enabled

•

Set to 1'b1 to enable.

Bits

[7:5]

[4:3]

[2]

[1]

[0]

Default

3'd0

2'd0

1'b0

Bits

Mnemonic

Description

[7:5]

ADC_COMP_SEL_CH1A

Sets the gain of Comparator of Channel 1A.

•

Program to 3'b001 for optimum performance

[4:3]

ADC_SUM_SEL_CH1A

Sets the bandwidth of the summing amplifier for Channel 1A.

•

Program to 2'b11 for optimum performance

[2]

ADC_USE_DITHER_EXT_CH1A

Enable the external dither for Channel 1A.

•

Default value is 0.

[1]

ADC_USE_DITHER_CH1A

Enable the dither for Channel 1A.

•

Default value is 0, dither is not enabled

[0]

ADC_USE_STATE_CH1A

Use state as logic output for Channel 1A.

•

Program to 1'b1 for optimum performance

ES9822PRO Datasheet(PDF) 71 Page - ESS Technology,Inc

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