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ES9822PRO Datasheet(PDF) 10 Page - ESS Technology,Inc |
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ES9822PRO Datasheet(HTML) 10 Page - ESS Technology,Inc |
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10 / 126 page ![]() 0.3 ES9822 PRO Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 10 Audio Signal Processor (ASP) 4 The ES9822 PRO includes 2 stereo audio signal processors (ASP) which can be used to implement both custom filter coefficients as well as custom filter architectures. This feature may also be used to implement a programmable equalizer (PEQ) and other applications. See Digital Signal Path diagram for location in the data path. ASP Registers: • Registers 35-58 Clip Detection5 If the peak level of the ES9822 PRO device’s input audio stream rises above the programmed ADC#_CLIP_LEVEL value, the corresponding clip flag will be set. The clip flag will stay set until it is cleared with INTERRUPT_CLEAR_CH#_CLIP_DETECTION. Any of the GPIO pins can be configured to output the state of any of the clip flags if INTERRUPT_MASK_CH#_CLIP_ DETECTION is set for the corresponding channel. Clipping Level Registers: • Register 106: ADC CH1 PEAK DETECTOR LEVEL • Register 123: ADC CH2 PEAK DETECTOR LEVEL Clipping Interrupt Clear Registers: • Register 27 [5]: INTERRUPT_CLEAR_CH2_CLIP_DETECTION • Register 27 [4]: INTERRUPT_CLEAR_CH1_CLIP_DETECTION Clipping Interrupt Mask Registers • Register 27 [1]: INTERRUPT_MASK_CH2_CLIP_DETECTION • Register 27 [0]: INTERRUPT_MASK_CH1_CLIP_DETECTION The GPIO READBACK register values 4’d4 – 4’d7 output the clip interrupt state for CH1 & CH2, respectively. The corresponding channel bit in Register 27[3:0] INTERRUPT_CLEAR_CH#_CLIP_DETECTION needs to be set for the GPIO to output the flag value. 4 For help with designing with the ASP, please reference the ASP GUIDE Application Note. Available from your local FAE upon request. 5 For further information on using Clip Detection, please reference the Clip Detector Configuration Application Note. Available from your local FAE upon request |
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