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ES9842PRO Datasheet(PDF) 15 Page - ESS Technology,Inc |
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ES9842PRO Datasheet(HTML) 15 Page - ESS Technology,Inc |
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15 / 167 page  VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM ES9842 PRO Product Datasheet 15 I2S decoder and Programmable Delay The ES9842 PRO has a built in I2S decoder that can be mixed with the ASP. A programmable delay is also included to help with phase correction when mixing. I2S Decoder Configuration Registers: • Registers 59-60: I2S DECODER CONFIG Programmable Delay Registers: • Register 62-61[9]: ENABLE_CLK_DL • Registers 62-61[8:0]: PROG_DELAY_LINE Configuration pins for I2S decoder: • GPIO 1: BCK • GPIO 2: WS • GPIO 5: DATA (would be configured as an AUX Input through the GPIO configuration) Mixing is accomplished using the ASP registers expanded on under the Audio Signal Processor (ASP) section. |
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