| Electronic Components Datasheet Search |
|
ES9842PRO Datasheet(PDF) 42 Page - ESS Technology,Inc |
|
|
|||||||||||||||||||||||||||||
ES9842PRO Datasheet(HTML) 42 Page - ESS Technology,Inc |
|
42 / 167 page ![]() CONFIDENTIAL ADVANCE INFORMATION ES9842 PRO Product Datasheet 42 VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM DSD Master Clock Rate Configurations MCLK Frequency BCK [MHz] FS [kHz] DSD Mode Register 7 [3:0] SELECT_DSD_N UM Register 7 [4] DSD_CLK_DIV2 Reg 2 [4:0] SELECT_ADC_N UM Value Divider Value Divider Value Divider 22.579 MHz 2.822 44.1 DSD 64 5’d3 4 1’b1 2 5’d7 8 5.645 44.1 DSD 128 5’d1 2 1’b1 2 5’d7 8 11.290 44.1 DSD 256 5’d0 1 1’b1 2 5’d7 8 45.158 MHz 2.822 44.1 DSD 64 5’d7 8 1’b1 2 5’d7 8 5.645 44.1 DSD 128 5’d3 4 1’b1 2 5’d7 8 11.290 44.1 DSD 256 5’d1 2 1’b1 2 5’d7 8 22.579 44.1 DSD 512 5’d0 1 1’b1 2 5’d7 8 Table 13 - DSD Master Clock Rate Configurations |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |