THGAMRG7T13BAIL

3

February 14th, 2019

© 2019 Toshiba Memory Corporation

Sleep Mode Current

Part Number

Density

NAND Flash Type

Interleave

Operation

ICCQS [μA]

ICCQS+ICCS [μA]

Typ. Note 1

Max. Note 2

Typ. Note 1

Max. Note 2

THGAMRG7T13BAIL

16GB

1 x 128Gbit BiCS3

Non Interleave

TBD

TBD

TBD

TBD

Note 1: The conditions of typical values are 25°C and VCCQ = 1.8V.

Note 2: The conditions of maximum values are 85°C and VCCQ = 1.95V.

Product Architecture

The diagram in Figure 1 illustrates the main functional blocks of the THGAMRG7T13BAIL.

Specification of the CREG and recommended values of the CVCC, and CVCCQ in the Figure 1 are as follows.

Parameter

Symbol

Unit

Min.

Typ.

Max.

Remark

VDDi capacitor value

CREG

μF

1

2.2 Note 1

4.7

VCC capacitor value

CVCC

μF

-

4.7 + 0.22

-

VCCQ capacitor value

CVCCQ

μF

-

4.7 + 0.1

-

Note 1: Toshiba Memory recommends that the value should be usually applied as the value of CREG.

Figure 1

THGAMRG7T13BAIL Block Diagram

REGULATOR

CORE LOGIC

NAND

NAND

Control signal

NAND I/O

VCC (3.3V)

x11

VCCQ (1.8V)

VDDi

MMC I/F (1.8V)

Package

CVCC

CVCCQ

CREG