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SL2S3003 Datasheet(PDF) 12 Page - NXP Semiconductors

Part # SL2S3003
Description  ICODE 3 (TagTamper)
PDF  82 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SL2S3003 Datasheet(HTML) 12 Page - NXP Semiconductors

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NXP Semiconductors
SL2S3003/SL2S3003TT
ICODE 3 (TagTamper)
8.2 Memory organization
The 2432-bit user-accessible EEPROM memory is divided into 76 blocks. The block is the smallest access unit.
Each block consists of 4 bytes or 32 bits. Bit 0 in each byte represents the least significant bit (LSB) and bit 7 is
the most significant bit (MSB).
The entire memory is divided into two parts:
• User memory
– The blocks 0 to 74 (2400 bits) are used to store the user data. Direct read/write access to this part of the
memory is possible depending on the security and write protection conditions. The user memory can be
accessed with the READ and WRITE commands.
– The last block of the user memory (block 75) contains the 24-bit counter and the password protection flag of
the counter.
• Configuration memory
– This part of the memory stores the information to configure the ICODE 3. The configuration memory can be
accessed with the READ CONFIG and WRITE CONFIG commands.
Block
Byte 0
Byte 1
Byte 2
Byte 3
Description
0
1
2
3
:
:
:
:
:
72
73
74
User memory:
75 blocks,
4 bytes each,
300 bytes in total.
75
C0
C1
C2
PROT
Counter
Table 4. User memory organization
Note: Block 75 contains the 24-bit counter and cannot be used to store user data. READ and WRITE
commands to that block require special data considerations (refer to Section 8.5.3.25).
Block
Byte 0
Byte 1
Byte 2
Byte 3
Description
0
1
2
3
:
:
:
:
:
44
45
46
47
Configuration memory:
48 blocks,
4 bytes each,
192 bytes in total.
48 - 127
RFU
RFU
RFU
RFU
Reserved configuration memory
Table 5. Configuration memory organization
SL2S3003/SL2S3003TT
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 3.0 — 28 March 2024
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