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MFS5600AMBAFES Datasheet(PDF) 74 Page - NXP Semiconductors |
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MFS5600AMBAFES Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 118 page  NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer 18.1 Register descriptions The following bit-types are used in the FS5600 register map. Bit type Description RWOTP Read-write bit with default value loaded from OTP RO Read-only RW Read-write capable FLGWC Write 1 to clear flag bit EXTRW Read-write bit with self-set/reset capability Table 55. FS5600 register map bit-types 18.1.1 SW1CTRL register Bit Symbol Description 2 SW1_EN Switcher enable. Applied to the switcher only when SW1_EN = NOT(NOT_SW1_EN). 1b'0 — Disable SW1. 1b'1 — SW1 Enabled provided EN1 is high. Reset Condition — POR 1 to 0 SW1_MODE[1:0] SW1 Operating mode. Applied to the switcher only when SW1_ MODE[1:0] = NOT(NOT_SW1_MODE[1:0]). 2b'00 — SW1 in PFM Mode. 2b'01 — Reserved. 2b'10 — Reserved. 2b'11 — SW1 in PWM mode. Reset Condition — POR Table 56. SW1CTRL register description 18.1.2 NOT_SW1CTRL register Bit Symbol Description 2 NOT_SW1_EN Switcher enable. Applied to the switcher only when SW1_EN = NOT(NOT_SW1_EN). 1b'0 — See SW1_EN in SW1CTRL register. 1b'1 — See SW1_EN in SW1CTRL register. Reset Condition — POR 1 to 0 NOT_SW1_MODE[1:0] SW1 Operating Mode. Applied to the switcher only when SW1_ MODE[1:0] = NOT(NOT_SW1_MODE[1:0]) 2b'00 — See SW1_MODE[1:0] in SW1CTRL register. 2b'01 — See SW1_MODE[1:0] in SW1CTRL register. 2b'10 — See SW1_MODE[1:0] in SW1CTRL register. 2b'11 — See SW1_MODE[1:0] in SW1CTRL register. Reset — Condition POR Table 57. NOT_SW1CTRL register description FS5600 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 29 April 2024 74 / 118 |
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