ISM330BX datasheet(145/150 Pages) STMICROELECTRONICS

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Table 109. UI_OUTX_L_A_DualC register ......................................................... 75

Table 110. UI_OUTX_H_A_DualC register ......................................................... 75

Table 111. UI_OUTX_A_DualC register description ................................................... 75

Table 112. AH_QVAR_OUT_L register ............................................................ 76

Table 113. AH_QVAR_OUT_H register............................................................ 76

Table 114. AH_QVAR_OUT register description ..................................................... 76

Table 115. TIMESTAMP output registers .......................................................... 76

Table 116. TIMESTAMP output register description ................................................... 76

Table 117. WAKE_UP_SRC register ............................................................. 77

Table 118. WAKE_UP_SRC register description ..................................................... 77

Table 119. TAP_SRC register .................................................................. 78

Table 120. TAP_SRC register description .......................................................... 78

Table 121. D6D_SRC register .................................................................. 79

Table 122. D6D_SRC register description .......................................................... 79

Table 123. EMB_FUNC_STATUS_MAINPAGE register ................................................ 80

Table 124. EMB_FUNC_STATUS_MAINPAGE register description ........................................ 80

Table 125. FSM_STATUS_MAINPAGE register ...................................................... 80

Table 126. FSM_STATUS_MAINPAGE register description .............................................. 80

Table 127. MLC_STATUS _MAINPAGE register ..................................................... 81

Table 128. MLC_STATUS_MAINPAGE register description .............................................. 81

Table 129. INTERNAL_FREQ_FINE register........................................................ 81

Table 130. INTERNAL_FREQ_FINE register description................................................ 81

Table 131. ODRcoeff values ................................................................... 81

Table 132. FUNCTIONS_ENABLE register ......................................................... 82

Table 133. FUNCTIONS_ENABLE register description ................................................. 82

Table 134. INACTIVITY_DUR register ............................................................ 83

Table 135. INACTIVITY_DUR register description .................................................... 83

Table 136. INACTIVITY_THS register ............................................................ 83

Table 137. INACTIVITY_THS register description .................................................... 83

Table 138. TAP_CFG0 register ................................................................. 84

Table 139. TAP_CFG0 register description ......................................................... 84

Table 140. TAP_CFG1 register ................................................................. 85

Table 141. TAP_CFG1 register description ......................................................... 85

Table 142. TAP priority decoding ................................................................ 85

Table 143. TAP_CFG2 register ................................................................. 85

Table 144. TAP_CFG2 register description ......................................................... 85

Table 145. TAP_THS_6D register ............................................................... 86

Table 146. TAP_THS_6D register description ....................................................... 86

Table 147. Threshold for D6D function ............................................................ 86

Table 148. TAP_DUR register .................................................................. 87

Table 149. TAP_DUR register description .......................................................... 87

Table 150. WAKE_UP_THS register.............................................................. 87

Table 151. WAKE_UP_THS register description ..................................................... 87

Table 152. WAKE_UP_DUR register ............................................................. 88

Table 153. WAKE_UP_DUR register description ..................................................... 88

Table 154. FREE_FALL register ................................................................ 88

Table 155. FREE_FALL register description ........................................................ 88

Table 156. Threshold for free-fall function .......................................................... 88

Table 157. MD1_CFG register .................................................................. 89

Table 158. MD1_CFG register description.......................................................... 89

Table 159. MD2_CFG register .................................................................. 90

Table 160. MD2_CFG register description.......................................................... 90

Table 161. EMB_FUNC_CFG register ............................................................ 91

Table 162. EMB_FUNC_CFG register description .................................................... 91

Table 163. TDM_CFG0 register ................................................................. 92

ISM330BX

List of tables

DS14588 - Rev 2

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