© 2007 Microchip Technology Inc.

DS21295C-page 3

MCP3004/3008

Analog Inputs

Input Voltage Range for CH0 or

CH1 in Single-Ended Mode

V

Input Voltage Range for IN+ in

pseudo-differential mode

IN-

—

Input Voltage Range for IN- in

pseudo-differential mode

—

mV

Leakage Current

—

0.001

±1

µA

Switch Resistance

—

1000

—

Ω

See Figure 4-1

Sample Capacitor

—

20

—

pF

See Figure 4-1

Digital Input/Output

Data Coding Format

Straight Binary

High Level Input Voltage

——

V

Low Level Input Voltage

—

V

High Level Output Voltage

4.1

—

—

V

Low Level Output Voltage

——0.4

V

Input Leakage Current

-10

—

10

µA

Output Leakage Current

-10

—

10

µA

Pin Capacitance

(All Inputs/Outputs)

——

10

pF

Timing Parameters

Clock Frequency

——3.6

1.35

MHz

MHz

Clock High Time

125

—

—

ns

Clock Low Time

125

—

—

ns

CS Fall To First Rising CLK Edge

100

—

—

ns

CS Fall To Falling CLK Edge

——

0

ns

Data Input Setup Time

——

50

ns

Data Input Hold Time

——

50

ns

CLK Fall To Output Data Valid

——

125

200

ns

ns

CLK Fall To Output Enable

——

125

200

ns

ns

CS Rise To Output Disable

—

—

100

ns

See Test Circuits, Figure 1-2

CS Disable Time

270

—

—

ns

D

—

—

100

ns

See Test Circuits, Figure 1-2

(Note 1)

D

—

—

100

ns

See Test Circuits, Figure 1-2

(Note 1)

ELECTRICAL SPECIFICATIONS (CONTINUED)

Parameter

Sym

Min

Typ

Max

Units

Conditions

Note 1: This parameter is established by characterization and not 100% tested.

3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity

performance, especially at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,

for more information.