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TDA8366 Datasheet(PDF) 29 Page - NXP Semiconductors

Part # TDA8366
Description  I2C-bus controlled PAL/NTSC TV processor
PDF  48 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8366 Datasheet(HTML) 29 Page - NXP Semiconductors

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January 1995
29
Philips Semiconductors
Objective specification
I2C-bus controlled PAL/NTSC TV
processor
TDA8366
Notes
1. On set AGC.
2. This parameter is not tested during production and is just given as application information for the designer of the
television receiver.
3. Measured at 10 mV (RMS) top sync input signal.
4. So called projected zero point, i.e. with switched demodulator.
5. Measured in accordance with the test line given in Fig.10. For the differential phase test the peak white setting is
reduced to 87%.
a) The differential gain is expressed as a percentage of the difference in peak amplitudes between the largest and
smallest value relative to the subcarrier amplitude at blanking level.
b) The phase difference is defined as the difference in degrees between the largest and smallest phase angle.
6. This parameter is not tested during production but is guaranteed by the design and qualified by means of matrix
batches which are made in the pilot production period.
7. This figure is valid for the complete video signal amplitude (peak white-to-black), see Fig.11.
8. The test set-up and input conditions are given in Fig.12. The figures are measured with an input signal of
10 mV RMS.
9. Measured with a source impedance of 75
Ω, where:
10. To obtain a good noise immunity of the AGC circuit the AGC detector is gated during the sync pulse. This gating is
switched-off during the vertical retrace to avoid disturbances of the signal amplitude due to phase errors of the
incoming video signal which are caused by the head-switching of VCRs.
BEAM CURRENT LIMITING (PIN 20); note 28
VCR
contrast reduction starting
voltage
4
V
VdiffCR
voltage difference for full
contrast reduction
2
V
VBR
brightness reduction starting
voltage
3
V
VdiffBR
voltage difference for full
brightness reduction
2
V
Vbias
internal bias voltage
4.5
V
Ich(int)
internal charge current
40
−µA
Idisch
discharge current due to
‘peak-white limiting’
200
−µA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
S/N = 20 log
V
O (black-to-white)
V
m rms
() B= 5 MHz
()
---------------------------------------------------------



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