DS3101 datasheet(91/149 Pages) DALLAS

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DS3101 Stratum 3/3E Timing Card IC

91 of 149

IER3

Interrupt Enable Register 3

45h

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

FSMON

T4LOCK

PHMON

T4NOIN

AMI2

LOS2

AMI1

LOS1

Default

Bit 7: Interrupt Enable for Frame Sync Input Monitor Alarm (FSMON). This bit is an interrupt enable for the

FSMON bit in the MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 6: Interrupt Enable for T4 DPLL Lock Status Change (T4LOCK). This bit is an interrupt enable for the

T4LOCK bit in the MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 5: Interrupt Enable for Phase Monitor Alarm (PHMON). This bit is an interrupt enable for the PHMON bit in

the MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 4: Interrupt Enable for T4 No Valid Inputs Alarm (T4NOIN). This bit is an interrupt enable for the T4NOIN bit

in the MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 3: Interrupt Enable for AMI Violation on IC2 (AMI2). This bit is an interrupt enable for the AMI2 bit in the

MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 2: Interrupt Enable for LOS Error on IC2 (LOS2). This bit is an interrupt enable for the LOS2 bit in the MSR3

0 = Mask the interrupt

1 = Enable the interrupt

Bit 1: Interrupt Enable for AMI Violation on IC1 (AMI1). This bit is an interrupt enable for the AMI1 bit in the

MSR3 register.

0 = Mask the interrupt

1 = Enable the interrupt

Bit 0: Interrupt Enable for LOS Error on IC1 (LOS1). This bit is an interrupt enable for the LOS1 bit in the MSR3

0 = Mask the interrupt

1 = Enable the interrupt

DS3101 Datasheet(PDF) 91 Page - Dallas Semiconductor

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