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AS7C31026C Datasheet(PDF) 4 Page - Alliance Semiconductor Corporation

Part # AS7C31026C
Description  3.3 V 64K X 16 CMOS SRAM
PDF  10 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS7C31026C Datasheet(HTML) 4 Page - Alliance Semiconductor Corporation

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AS7C31026C
9/20/06, v 1.0
Alliance Memory
P. 4 of 10
®
Key to switching waveforms
Read waveform 1 (address controlled)3,6,7,9
Read waveform 2 (OE, CE, UB, LB controlled)3,6,8,9
Read cycle (over the operating range)3,9
Parameter
Symbol
AS7C31026C-10
Unit
Notes
Min
Max
Read cycle time
tRC
10
ns
Address access time
tAA
–10
ns
3
Chip enable (CE) access time
tACE
–10
ns
3
Output enable (OE) access time
tOE
–5
ns
Output hold from address change
tOH
4–
ns
5
CE low to output in low Z
tCLZ
4
ns
4, 5
CE high to output in high Z
tCHZ
5
ns
4, 5
OE low to output in low Z
tOLZ
0
ns
4, 5
Byte select access time
tBA
–5
ns
Byte select Low to low Z
tBLZ
0
ns
4, 5
Byte select High to high Z
tBHZ
5
ns
4, 5
OE high to output in high Z
tOHZ
5
ns
4, 5
Power up time
tPU
0
ns
4, 5
Power down time
tPD
–10
ns
4, 5
Undefined output/don’t care
Falling input
Rising input
tOH
tAA
tRC
tOH
DataOUT
Address
Data valid
Previous data valid
Data valid
tRC
tAA
tBLZ
tBA
tOE
tOLZ
tOH
tOHZ
tHZ
tBHZ
tACE
tLZ
Address
OE
CE
LB, UB
DataIN



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