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STM32G473MB Datasheet(PDF) 23 Page - STMicroelectronics

Part # STM32G473MB
Description  Arm® Cortex®-M4 32-bit MCUFPU, up to 512 KB Flash, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math accelerator
PDF  229 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G473MB Datasheet(HTML) 23 Page - STMicroelectronics

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DS12712 Rev 5
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STM32G473xB STM32G473xC STM32G473xE
Functional overview
47
•
VREF-, VREF+
VREF+ is the input reference voltage for ADCs and DACs. It is also the output of the
internal voltage reference buffer when enabled.
When VDDA < 2 V VREF+ must be equal to VDDA.
When VDDA ≥ 2 V VREF+ must be between 2 V and VDDA.
The internal voltage reference buffer supports three output voltages, which are
configured with VRS bits in the VREFBUF_CSR register:
–VREF+ = 2.048 V
–VREF+ = 2.5 V
–VREF+ = 2.9 V
VREF- is double bonded with VSSA.
During power up and power down, the following power sequence is required:
•
When VDD is below 1 V, then VDDA supply must remain below VDD + 300 mV
•
When VDD is above 1 V, all power supplies became independent.
During power down phase, VDD can temporarily become lower then other supplies only
if the energy provided to the MCU remains below 1 mJ. This allows external decoupling
capacitors to be discharged with different time constants during the power down
transient phase.
Figure 3. Power-up/down sequence
MSv72398V1
0.3
1
VBOR0
3.6
Operating mode
Power-on
Power-down
time
V
VDDA
(1)
VDD
Invalid supply area
VDDA < VDD + 300 mV
VDDA independent from VDD



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