STM32G473MB datasheet(41/229 Pages) STMICROELECTRONICS

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DS12712 Rev 5

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STM32G473xB STM32G473xC STM32G473xE

Functional overview

3.29

Universal synchronous/asynchronous receiver transmitter

(USART)

The STM32G473xB/xC/xE devices have three embedded universal synchronous receiver

transmitters (USART1, USART2 and USART3) and two universal asynchronous receiver

transmitters (UART4, USART5).

These interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN master/slave capability. They provide hardware management of the CTS and RTS

signals, and RS485 driver enable.

The USART1, USART2 and USART3 also provide a Smartcard mode (ISO 7816 compliant)

and an SPI-like communication capability.

The USART comes with a Transmit FIFO (TXFIFO) and a Receive FIFO (RXFIFO). FIFO

mode is enabled by software and is disabled by default.

All USARTs have a clock domain independent from the CPU clock, allowing the U(S)ARTx

(x=1,2,3,4,5) to wake up the MCU from Stop mode. The wakeup from Stop mode can be

done on:

•

Start bit detection

•

Any received data frame

•

A specific programmed data frame

•

Some specific TXFIFO/RXFIFO status interrupts when FIFO mode is enabled

All USART interfaces can be served by the DMA controller.

Table 9. USART/UART/LPUART features

USART modes/features(1)

USART1 USART2 USART3 UART4

UART5

LPUART1

Hardware flow control for modem

XXXXX

Continuous communication using DMA

XXXXX

Multiprocessor communication

XXXXX

Synchronous mode

Smartcard mode

Single-wire half-duplex communication

XXXXX

IrDA SIR ENDEC block

XXXXX

LIN mode

XXXXX

Dual clock domain

XXXXX

Wakeup from Stop mode

XXXXX

Receiver timeout interrupt

XXXXX

Modbus communication

XXXXX

Auto baud rate detection

X (4 modes)

Driver Enable

XXXXX

LPUART/USART data length

7, 8 and 9 bits

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