STM32G473MB datasheet(25/229 Pages) STMICROELECTRONICS

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DS12712 Rev 5

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STM32G473xB STM32G473xC STM32G473xE

Functional overview

RTC, Stop mode without RTC). Some peripherals with wakeup capability can enable

the HSI16 RC during Stop mode, so as to get clock for processing the wakeup event.

•

Standby mode: The Standby mode is used to achieve the lowest power consumption

with brown-out reset, BOR. The internal regulator is switched off to power down the

VCORE domain. The PLL, as well as the HSI16 RC oscillator and the HSE crystal

oscillator are also powered down. The RTC can remain active (Standby mode with

RTC, Standby mode without RTC). The BOR always remains active in Standby mode.

For each I/O, the software can determine whether a pull-up, a pull-down or no resistor

shall be applied to that I/O during Standby mode. Upon entering Standby mode, SRAM

and register contents are lost except for registers in the RTC domain and standby

circuitry. The device exits Standby mode upon external reset event (NRST pin), IWDG

reset event, wakeup event (WKUP pin, configurable rising or falling edge) or RTC

event (alarm, periodic wakeup, timestamp, tamper), or when a failure is detected on

LSE (CSS on LSE).

•

Shutdown mode: The Shutdown mode allows to achieve the lowest power

consumption. The internal regulator is switched off to power down the VCORE domain.

The PLL, as well as the HSI16 and LSI RC-oscillators and HSE crystal oscillator are

also powered down. The RTC can remain active (Shutdown mode with RTC, Shutdown

mode without RTC). The BOR is not available in Shutdown mode. No power voltage

monitoring is possible in this mode. Therefore, switching to RTC domain is not

supported. SRAM and register contents are lost except for registers in the RTC

domain. The device exits Shutdown mode upon external reset event (NRST pin),

IWDG reset event, wakeup event (WKUP pin, configurable rising or falling edge) or

RTC event (alarm, periodic wakeup, timestamp, tamper).

3.11.5

Reset mode

In order to improve the consumption under reset, the I/Os state under and after reset is

“analog state” (the I/O schmitt trigger is disabled). In addition, the internal reset pull-up is

deactivated when the reset source is internal.

3.11.6

VBAT operation

The VBAT pin allows to power the device VBAT domain from an external battery, an external

supercapacitor, or from VDD when there is no external battery and when an external

supercapacitor is present. The VBAT pin supplies the RTC with LSE and the backup

registers. Three anti-tamper detection pins are available in VBAT mode.

The VBAT operation is automatically activated when VDD is not present. An internal VBAT

battery charging circuit is embedded and can be activated when VDD is present.

Note:

When the microcontroller is supplied from VBAT, neither external interrupts nor RTC

alarm/events exit the microcontroller from the VBAT operation.

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