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ST72324BJ2 Datasheet(PDF) 15 Page - STMicroelectronics |
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ST72324BJ2 Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 188 page  ST72324B Register and memory map 15/188 3 Register and memory map As shown in Figure 6, the MCU is capable of addressing 64 Kbytes of memories and I/O registers. The available memory locations consist of 128 bytes of register locations, up to 1024 bytes of RAM and up to 32 Kbytes of user program memory. The RAM space includes up to 256 bytes for the stack from 0100h to 01FFh. The highest address bytes contain the user reset and interrupt vectors. Caution: Never access memory locations marked as ‘Reserved’. Accessing a reserved area can have unpredictable effects on the device. Figure 6. Memory map 0000h RAM Program memory (32, 16 or 8 Kbytes) Interrupt and reset vectors HW registers 0080h 007Fh 7FFFh (see Table 2) 8000h FFDFh FFE0h FFFFh (see Table 24) 0480h Reserved 047Fh Short addressing RAM (zero page) 256 bytes stack 16-bit addressing RAM 0100h 01FFh 027Fh 0080h 0200h 00FFh 32 Kbytes 8000h FFFFh or 047Fh 16 Kbytes C000h (1024, 512 or 384 bytes) 8 Kbytes E000h Table 2. Hardware register map Address Block Register label Register name Reset status Remarks 0000h 0001h 0002h Port A(1) PADR PADDR PAOR Port A data register Port A data direction register Port A option register 00h(2) 00h 00h R/W R/W R/W 0003h 0004h 0005h Port B(1) PBDR PBDDR PBOR Port B data register Port B data direction register Port B option register 00h(2) 00h 00h R/W R/W R/W 0006h 0007h 0008h Port C PCDR PCDDR PCOR Port C data register Port C data direction register Port C option register 00h(2) 00h 00h R/W R/W R/W 0009h 000Ah 000Bh Port D(1) PDADR PDDDR PDOR Port D data register Port D data direction register Port D option register 00h(2) 00h 00h R/W R/W R/W 000Ch 000Dh 000Eh Port E(1) PEDR PEDDR PEOR Port E data register Port E data direction register Port E option register 00h(2) 00h 00h R/W R/W(1) R/W(1) |
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