| Electronic Components Datasheet Search |
|
SC4901ITSTRT Datasheet(PDF) 17 Page - Semtech Corporation |
|
|
|||||||||||||||||||||||||||||
SC4901ITSTRT Datasheet(HTML) 17 Page - Semtech Corporation |
|
17 / 20 page ![]() 17 2005 Semtech Corp. www.semtech.com SC4901 POWER MANAGEMENT Application Information (Cont.) The series FET QS is turned ON and OFF in a controlled manner synchronously with the secondary waveform. The width of the ON time pulse is varied to regulate the output. Fig 10) Synchronous Post Regulation Again it should be understood that all previous attempts have used a non synchronously rectified secondary..... That is, the transformer secondary was rectified using power diodes and the series MOSFET was added to synchronously regulate it further. The Combi Sync Technique The Combi Sync, as the name indicates is a unique secondary configuration that combines synchronous rectification and post regulation on transformer isolated multiple secondary voltages. The proposed implementation as well as typical waveforms are shown in Fig 11) on the next page. The highlights of its operation are as follows a) Prior to the transformer voltage going positive, the rectifying MOSFET QR is conducting. When the voltage goes positive, QR is turned OFF. b) After a delay, both QF and QS are turned ON. This delay prevents both high and low side FETs conducting at the same time and shorting the secondary winding. c) The forward pair of QS and QF acts as a bidirectional switch and can be turned off in a controlled manner irrespective of the polarity of the transformer voltage. This is the key to the topology. With SC4901 the forward pair is turned off on any of the following conditions i) end of the active PWM duration ii) peak current crosses the overload limit or, iii) transformer secondary voltage begins to fall. d) After the forward FETs QS and QF are turned OFF, the rectifying FET QR is turned after a short delay. QR continues to conduct until the beginning of the next cycle when transformer secondary voltage goes positive again. By modulating the ON time of the high side power MOSFETs output regulation is achieved. This arrangement of MOSFETs and their control provides a highly efficient combination of synchronous rectification and simultaneous control of isolated secondary voltages. Trailing Edge Modulation The Combi Sync topology offers the option of both leading and trailing edge modulations to achieve synchronous post regulation. With leading edge modulation, QS and QF are turned on during the forward mode, with a PWM dictated delay, but the turn off is synchronised to the falling edge of the transformer voltage. This results in zero current turn on for the primary switch but a hard turn off with full load. On the other hand, in conventional secondary side post regulation, the trailing edge modulation results in hard turn on and zero current turn off for the primary switch. However, the Combi Sync topology already has an inherent turn on delay for the forward FETs on the secondary side. This ensures zero current turn on for the primary switch, irrespective of the modulation scheme used. It is therefore advantageous to use trailing edge modulation which now results in both zero current turn on and turn off for the primary switch. If some form of ZVS is used in primary control, all of the switching losses may be eliminated on the primary side. Trailing edge modulation is the method employed in SC4901. Switching Waveforms Theoretical switching waveforms of the Combi Sync topology are shown on the next page. The first is the transformer secondary voltage which acts as the reference. Second and third are the gate drives for forward and rectifying FETs respectively. Rectified and pulse width modulated output that appears before the LC filter stage is shown next. Notice that this rectified output rises after a delay which is crucial to isolated synchronous rectification. In the simple isolated synchronous rectifiers, there is no QS, and QF begins to conduct (initially through its body diode) at the same instant as the transformer voltage going positive. Transformer secondary and inductor currents are also shown. The delay T1-T0 is set by the capacitor CT and the T3-T2 delay is fixed internally in SC4901 DS QS •• T C OUTP UT |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |