STA5620

Pin and I/O cells

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5

Pin and I/O cells

5.1

Mode

This pin allows a choice of initial configuration of the registers at reset. This pin will always

be an input. In application this pin will be connected either LO or HI.

When it is low the chip is configured to use 16.368MHz as reference frequency, otherwise

the reference frequency is 19.2MHz. To use other reference frequencies the MODE bit must

be overwritten by SPI.

5.2

RF_EN

This pin provides control over the operating state of the RF and PLL sections. When it is low

those blocks are off, when high the status of the blocks depends of CHIP_EN. This pin will

always be an input.

5.3

CHIP_EN

This pin provides control over the operating state of the chip. When it is low the entire chip is

disabled and only a leakage current is present (< 10µA). On the rising edge it provides the

SPI with a reset signal, the SPI default status depends on MODE and RF_EN pins status.

When it is high the entire chip is enabled. This pin will always be an input.

5.4

TEST_EN1, TEST_EN2 and TEST_CLK

Those PINs are for ST test only. In the application TEST_EN1 must be set LOW, TEST_EN2