Chip enable and reset timing

STA5620

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8.1.1

Operating modes

The below table shows how select a particular default operating mode:

HIGH = VCC_IO; LOW = GND

MODE

LOW

→ sets the STA5620 internal dividers to work with 16.368 MHz reference and

GPS_CLK = ON and XTAL_CLK = OFF;

HIGH

→ sets the STA5620 internal dividers to work with 19.2 MHz reference and

GPS_CLK = ON and XTAL_CLK = ON;

In both cases GPS_CLK pin provides 16.368MHz clock to Base Band and SIGN pin

provides the DATA to Base Band.

CHIP_EN

LOW

→ the device goes to stand-by mode with very low power consumption.

HIGH

→ sets ON the internal blocks of the IC according to the RF_EN status;

A logic reset of the SPI registers is generated by the low to high transitions of the CHIP_EN

pin while the RF_EN is LOW.

RF_EN

LOW

→ the crystal oscillator and only one output buffer are enabled,

XTAL_CLK if MODE = 1 or GPS_CLK if MODE = 0;

HIGH

→ the whole chip is active and functional;

TEST_EN1

→ must be set LOW;

TEST_EN2

→ 'must be set HIGH (VCC_IO);

Table 14.

Operating modes

Operating modes

STA5620 current

consumption

CHIP_EN

RF_EN

TEST_EN1

TEST_EN2

Fully operating

MODE = 0

15mA

HIGH

HIGH

LOW

HIGH

MODE = 1

16mA

RF Chain OFF

Crystal oscillator ON

1.5mA

HIGH

LOW

LOW

HIGH

Stand-by

All internal blocks OFF

1

μA

LOW

x

LOW

HIGH