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UPSD3422 Datasheet(PDF) 200 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 200 Page - STMicroelectronics |
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200 / 293 page  PSD module uPSD34xx 200/293 Drive Select 08h 09h 16h 17h Write to configure port pins as either CMOS push-pull or Open Drain on some pins, while selecting high slew rate on other pins. Read to check status. Default output type is CMOS push-pull. Table 136 on page 235 Input Macrocells 0Ah 0Bh 18h Read to obtain logic state of IMCs. No WRITEs. Table 117 on page 224 Enable Out OCh 0Dh 1Ah 1Bh Read state of output enable logic on each I/O port driver. 1 = driver output is enabled, 0 = driver is off, and it is in high impedance state. No WRITEs. Table 140 on page 236 Output Macrocells AB (MCELLAB) 20h Read logic state of MCELLAB outputs (bank of eight OMCs). Write to load MCELLAB flip- flops. Table 113 on page 222 Output Macrocells BC (MCELLBC) 21h Read logic state of MCELLBC outputs (bank of eight OMCs). Write to load MCELLBC flip- flops. Table 114 on page 222 Mask Macrocells AB 22h Write to set mask for MCELLAB. Logic '1' blocks READs/WRITEs of OMC. Logic '0' will pass OMC value. Read to check status. Table 115 on page 223 Mask Macrocells BC 23h Write to set mask for MCELLBC. Logic '1' blocks READs/WRITEs of OMC. Logic '0' will pass OMC value. Read to check status. Table 116 on page 223 Main Flash Sector Protection C0h Read to determine Main Flash Sector Protection Setting (non- volatile) that was specified in PSDsoft Express. No WRITEs. Table 109 on page 212 Security Bit and Secondary Flash Sector Protection C2h Read to determine if PSD Module device Security Bit is active (non-volatile) Logic 1 = device secured. Also read to determine Secondary Flash Protection Setting (non- volatile) that was specified in PSDsoft. No WRITEs. Table 110 on page 212 PMMR0 B0h Power Management Register 0. WRITE and READ. Table 144 on page 243 Register Name Port A (80-pin) Port B Port C Port D Other Description Link |
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