UPSD3422 datasheet(206/293 Pages) STMICROELECTRONICS

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PSD module

uPSD34xx

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(FFh). The 8032 may erase the entire Flash memory array all at once, or erase individual

sector-by-sector, but not erase byte-by-byte. However, even though the Flash memories

cannot be erased byte-by-byte, the 8032 may program Flash memory byte-by-byte. This

means the 8032 does not need to program group of bytes (64, 128, etc.) at one time, like

some Flash memories.

Each Flash memory requires the 8032 to send an instruction sequence to program a byte or

to erase sectors (see Table 107 on page 203).

If the byte to be programmed is in a protected Flash memory sector, the instruction

sequence is ignored.

Important note: It is mandatory that a chip-select signal is active for the Flash sector where

a programming instruction sequence is targeted. The user must make sure that the correct

chip-select equation, FSx or CSBOOTx specified in PSDsoft Express matches the address

range that the 8032 firmware is accessing, otherwise the instruction sequence will not be

recognized by the Flash array. If memory paging is used, be sure that the 8032 firmware

sets the page register to the correct page number before issuing an instruction sequence to

the Flash memory segment on a particular memory page, otherwise the correct sector

select signal will not become active.

Once the 8032 issues a Flash memory program or erase instruction sequence, it must

check the status bits for completion. The embedded algorithms that are invoked inside a

Flash memory array provide several ways to give status to the 8032. Status may be checked

using any of three methods: Data Polling, Data Toggle, or Ready/Busy (pin PC3).

Table 108.

Flash Memory Status Bit Definition

Note:

X = Not guaranteed value, can be read either '1' or '0.'

DQ7-DQ0 represent the 8032 Data Bus Bits, D7-D0.

28.5.10

Data polling

Polling on the Data Polling Flag Bit (DQ7) is a method of checking whether a program or

erase operation is in progress or has completed. Figure 72 shows the Data Polling

algorithm.

When the 8032 issues a program instruction sequence, the embedded algorithm within the

Flash memory array begins. The 8032 then reads the location of the byte to be programmed

in Flash memory to check status. The Data Polling Flag Bit (DQ7) of this location becomes

the compliment of Bit D7 of the original data byte to be programmed. The 8032 continues to

poll this location, comparing the Data Polling Flag Bit (DQ7) and monitoring the Error Flag

Bit (DQ5). When the Data Polling Flag Bit (DQ7) matches Bit D7 of the original data, then

the embedded algorithm is complete. If the Error Flag Bit (DQ5) is '1,' the 8032 should test

the Data Polling Flag Bit (DQ7) again since the Data Polling Flag Bit (DQ7) may have

changed simultaneously with the Error Flag Bit (DQ5) (see Figure 72).

The Error Flag Bit (DQ5) is set if either an internal time-out occurred while the embedded

algorithm attempted to program the byte (indicating a bad Flash cell) or if the 8032

Functional

Block

FSx, or CSBOOTx

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

Flash Memory

Active (the desired

segment is selected)

Data

Polling

Toggl

e Flag

Error

Flag

Erase

Time-

out

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