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TMP93CS44 Datasheet(PDF) 210 Page - Toshiba Semiconductor

Part # TMP93CS44
Description  CMOS 16-Bit Microcontroller
PDF  224 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP93CS44 Datasheet(HTML) 210 Page - Toshiba Semiconductor

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TMP93CS44/S45
2004-02-10
93CS44-208
Timer control (3/3)
Symbol
Name
Address
7
6
5
4
3
2
1
0
QCU
DB6EN
DB4EN
R/W
R/W
0
0
0
Double buffer
0: Disable
1: Enable
T45CR
T4 and T5
control
register
3AH
Warm-up
timer
control
Double
buffer of
TREG6
Double
buffer of
TREG4
−
W
TREG6L
16-bit
timer
register 6
low
40H
(Prohibit
RMW)
Undefined
−
W
TREG6H
16-bit
timer
register 6
high
41H
(Prohibit
RMW)
Undefined
−
W
TREG7L
16-bit
timer
register 7
low
42H
(Prohibit
RMW)
Undefined
−
W
TREG7H
16-bit
timer
register 7
high
43H
(Prohibit
RMW)
Undefined
−
44H
R
CAP3L
Capture
register 3
low
Undefined
−
45H
R
CAP3H
Capture
register 3
high
Undefined
−
46H
R
CAP4L
Capture
register 4
low
Undefined
−
47H
R
CAP4H
Capture
register 4
high
Undefined
CAP3IN
CAP34M1 CAP34M0
CLE
T5CLK1
T5CLK0
W
R/W
1
0
0
0
0
0
T5MOD
16-bit
timer 5
source
CLK and
mode
control
register
48H
0:Software
capture
1: Don’t
care
Capture timing
00: Disable
01: TI6
↑ TI7 ↑
10: TI6
↑ TI6 ↓
11: TTF1
↑ TTF1 ↓
1: UC5
clear
enable
Source clock
00: TI6
01:
φT1
10:
φT4
11:
φT16
CAP4T6
CAP3T6
EQ7T6
EQ7T6
TFF6C1
TFF6C0
R/W
W
0
0
0
0
1
1
TFF6 invert trigger
0: Disable trigger
1: Enable trigger
T5FFCR
16-bit
timer 5
flip-flop
control
register
49H
Invert when
the UC value
is loaded to
CAP4
Invert when
the UC value
is loaded to
CAP3
Invert when
the UC
matches
TREG7
Invert when
the UC
matches
TREG6
00: Invert TFF6
01: Set TFF6
10: Clear TFF6
11: Don’t care



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