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TMP93CS44 Datasheet(PDF) 213 Page - Toshiba Semiconductor |
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TMP93CS44 Datasheet(HTML) 213 Page - Toshiba Semiconductor |
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213 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-211 Serial bus interface control (2/2) Symbol Name Address 7 6 5 4 3 2 1 0 SWRST R/W 0 SBICR3 Serial bus interface status register 3 4FH Software reset 0: − 1: Initialize SBI DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 R (Receive)/W (Send) SBIDBR Serial bus interface data buffer register 4CH (Prohibit RMW) Undefined SA6 SA5 SA4 SA3 SA2 SA1 SA0 ALS W 0 0 0 0 0 0 0 0 I2CAR I 2C bus address register 4DH (Prohibit RMW) Slave address selection Address recognition mode 0: Enable 1: Disable (9) Watchdog timer Symbol Name Address 7 6 5 4 3 2 1 0 WDTE WDTP1 WDTP0 WARM HALTM1 HALTM0 RESCR DRVE R/W 1 0 0 0 0 0 0 0 WDMOD Watchdog timer mode control register 5CH 1: WDT enable 00: 2 15/fSYS 01: 2 17/fSYS 10: 2 19/fSYS 11: 2 21/fSYS Warm-up timer 0: 2 14/inputted frequency 1: 2 16/ inputted frequency HALT mode 00: RUN mode 01: STOP mode 10: IDLE1 mode 11: IDLE2 mode 1: Connect internally WDT out to reset pin 1: Drive the pin in STOP mode − W − WDCR Watchdog timer control register 5DH B1H: WDT disable code 4EH: WDT clear code |
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