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UPSD3422EB40U6T Datasheet(PDF) 198 Page - STMicroelectronics |
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UPSD3422EB40U6T Datasheet(HTML) 198 Page - STMicroelectronics |
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198 / 293 page  PSD module uPSD34xx 198/293 Figure 70. VM register control of memories Figure 71. VM register example corresponding to memory map example 28.3 PSD module data bus width The PSD Module functions as an 8-bit device to the MCU Module except when the PFQ is fetching instructions from the Flash memory. When PSEN is active, the PSD Module always drives 16-bit data out onto the bus. DPLD Main Flash Memory Secondary Flash Memory CS CS FS0 - FS7 CSBOOT0 - CSBOOT3 WR VM REG BIT 4 VM REG BIT 3 VM REG BIT 1 VM REG BIT 2 RD WR OE WR OE 8032 Address 53 Other PLD Inputs PSEN AI10455 DPLD Main Flash Memory Secondary Flash Memory CS CS FS0 - FS7 CSBOOT0 - CSBOOT3 WR OE WR OE 8032 Address 53 Other PLD Inputs WR PSEN RD VM Register = 0Ch AI10456 |
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