AMC7820YSLASH2K datasheet(22/29 Pages) TI2

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AMC7820

SBAS231B

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DIGITAL INTERFACE

The AMC7820 communicates through a standard SPI bus,

which consists of four wires: SCLK (the serial clock pin),

MISO (Master-Out Slave-In data pin), MOSI (Master-In Slave-

Out data pin), and SS (Slave Select pin). The SPI master

device activates the slave select signal (SS = LOW) to

access the selected SPI slave device and generates SCLK

to synchronize the movement of the data both in and out of

the slave devices through the MOSI and MISO pins. The SPI

slave devices depend on a master to start and synchronize

transmissions.

A transmission begins when initiated by an SPI master. The

word from the master is shifted into the AMC7820 through

the MOSI pin under the control of the master serial clock,

SCLK. The word from the AMC7820 registers (the slave) is

shifted out from the MISO pin under control of SCLK as well.

The idle state of the serial clock for the AMC7820 is LOW,

which corresponds to a clock polarity setting of 0 (typical

microprocessor SPI control bit CPOL = 0). The AMC7820

interface is designed with a clock phase setting of 1 (typical

microprocessor SPI control bit CPHA = 1). In both the master

and slave, the data is shifted out on the rising edge of SCLK

and sampled on the falling edge of SCLK, where the data is

stable. The master begins driving its MOSI pin on the first

rising edge of SCLK after SS is activated (SS = LOW).

To write data into the AMC7820, the host activates the slave

select signal (SS = LOW) and issues a WRITE command to

start the data transmission. The AMC7820 always interprets

the first word (from the host) immediately following the falling

edge of the SS signal as a command. The data to be written

into the AMC7820 follows the command. SS must remain

LOW until all data is transmitted (see Figure 13), otherwise

the WRITE operation is terminated. Likewise, to read the

data from the AMC7820, the host activates the slave select

signal and sends a READ command. Then the AMC7820

sends data out through the MISO pin under control of SCLK.

SS must remain LOW until all data is shifted out (see Figure

13), otherwise the transmission is terminated.

When the operation is terminated, the master must issue a

new command to start a new operation. In the AMC7820, all

data is 16-bit. It takes 16 clock cycles of SCLK to transfer one

word of data.

AMC7820 COMMUNICATION PROTOCOL

The AMC7820 is entirely controlled by registers. Reading

and writing these registers is accomplished by a 16-bit

command that is sent prior to the data for that register. The

command is constructed, as shown in Table I.

The command word begins with a R/W bit that specifies the

direction of data flow. The following 4 bits specify the page

of memory this command is directed to, as shown in Table

II. The next five bits specify the register address on that

page of memory to which the data is directed. The last six

bits are reserved for future use.

PG3

PG2

PG1

PG0

PAGE ADDRESSED

0000

0001

0010

Reserved

0011

Reserved

0100

Reserved

0101

Reserved

0110

Reserved

0111

Reserved

1000

Reserved

1001

Reserved

1010

Reserved

1011

Reserved

1100

Reserved

1101

Reserved

1110

Reserved

1111

Reserved

TABLE II. Page Addressing.

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MSB

LSB

R/W

PG3

PG2

PG1

PG0

ADDR4

ADDR3

ADDR2

ADDR1

ADDR0

NOTE: R/W = 1 when reading; 0 when writing. X = Don’t care.

TABLE I. AMC7820 Command Word.

To read all the first page of memory, for example, the host

processor must send the command 0x8000—this specifies

a read operation beginning at Page 0, Address 0. The

processor can then start clocking data out of the AMC7820.

The AMC7820 will automatically increment its address

pointer to the end of the page; if the host processor

continues clocking data out past the end of a page, the

address will wrap around to the beginning of the page. This

is true of either reading or writing, so it is important that the

host makes sure of the address to which it is writing.

Likewise, writing to Page 1 of memory would consist of the

processor writing the command 0x0800 (which would specify

a write operation) with PG0 set to 1, and all the ADDR bits

set to 0. This would result in the address pointer pointing at

the first location in memory on Page 1 of memory. See the

AMC7820 Memory Map section for details of register loca-

tions. To make correct R/W operations, the host must issue

SS and SCLK properly.

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