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LMP91200MT/NOPB Datasheet(PDF) 5 Page - Texas Instruments |
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LMP91200MT/NOPB Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 25 page ![]() 5 LMP91200 www.ti.com SNAS571E – JANUARY 2012 – REVISED FEBRUARY 2016 Product Folder Links: LMP91200 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >TA. (2) Positive current corresponds to current flowing into the device. (3) The voltage on any pin should not exceed 6 V relative to any other pins. (4) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the Statistical Quality Control (SQC) method. (5) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. (6) Boldface limits are production tested at 125°C. Limits are specified through correlations using the Statistical Quality Control (SQC) method. (7) Excluding all currents which flows out from the device. (8) Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change. (9) This parameter is specified by design and/or characterization and is not tested in production. (10) Offset voltage long term drift is determined by dividing the change in VOS at time extremes of OPL procedure by the length of the OPL procedure. OPL procedure: 500 hours at 150°C are equivalent to about 15 years. (11) The short circuit test is a momentary open-loop test. 6.5 Electrical Characteristics Unless otherwise specified, all limits specified for TA = 25°C. VS = (VDD – GND) = 3.3 V. VREF = 3.3 V. (1) (2) (3) PARAMETER TEST CONDITIONS MIN(4) TYP(5) MAX(4) UNIT POWER SUPPLY Is Supply Current(6)(7) pH measurement mode 50 54 µA at the temperature extremes 59 pH BUFFER AolpH Open-loop Gain INP = 1.65 V, 300 mV = VOUT = VDD – 300 mV 120 dB at the temperature extremes 90 VospH Input Voltage Offset(6) INP = 1/2 VREF –200 200 µV at the temperature extremes –350 350 TcVospH Input offset voltage drift(8)(9) INP = 1/2 VREF –2.5 2.5 uV/°C VOSpH_drift Long-term VOSpH drift (10) 500 hours OPL 150 µV IbpH Input bias current at INP(9) 0 V < INP < 3.3 V –125 125 fA 0 V < INP < 3.3 V, 85°C –445 445 fA 0 V < INP < 3.3 V, 125°C –1.5 1.5 pA –500 mV < (INP – VCM) < 500 mV, VS = 0 V. –600 600 fA –500 mV < (INP – VCM) < 500 mV, 85°C, VS = 0 V. –6.5 6.5 pA –500 mV < (INP – VCM) < 500 mV, 125°C, VS = 0 V. –100 100 pA GBWPpH Gain Bandwidth Product(9) CL = 10 pF, RL = 1 MΩ 220 KHz CMRRpH DC_Common-mode rejection ratio INP = 1/2 VREF 80 dB PSRRpH DC_Power supply rejection ratio 1.8 V < VDD < 5 V INP = 1/2 VREF 80 dB En_RMSpH Input referred noise (low frequency)(9) Integrated 0.1 Hz to 10 Hz 2.6 µVPP enpH Input referred noise (high frequency)(9) f = 1 kHz 90 nV/ √Hz IscpH Output short circuit current(11) Sourcing, Vout to GND, INP = 1.65 V 13 mA at the temperature extremes 10 Sinking, Vout to VDD, INP = 1.65 V 12 mA at the temperature extremes 8 |
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