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LMP91200

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SNAS571E – JANUARY 2012 – REVISED FEBRUARY 2016

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Copyright © 2012–2016, Texas Instruments Incorporated

Electrical Characteristics (continued)

Unless otherwise specified, all limits specified for TA = 25°C. VS = (VDD – GND) = 3.3 V. VREF = 3.3 V.

(1)(2)(3)

PARAMETER

TEST CONDITIONS

MIN(4)

TYP(5)

MAX(4)

UNIT

PGA

VosPGA

Input Voltage Offset(6)

+IN_PGA (Internal node) =

500 mV

–275

275

µV

at the temperature

extremes

–480

480

TcVosPGA

Input offset voltage drift(9)(8)

+IN_PGA (Internal node) = 500 mV

–2.5

2.5

uV/°C

AolPGA

Open loop Gain

+IN_PGA (Internal node) =

500 mV

120

dB

at the temperature

extremes

90

AvPGA

Gain

5

V/V

Av_accPGA

Gain accuracy

at the temperature extremes

-1.3%

1.3%

En_RMSPGA

Input referred noise (low

frequency)(9)

Integrated 0.1 Hz to 10 Hz

2.6

µVPP

enPGA

Input referred noise (high

frequency)(9)

f = 1 kHz

90

nV/

√Hz

PSRRPGA

DC_Power supply rejection

ratio

1.8 V < VDD < 5 V,

+IN_PGA (Internal node) = 500 mV

80

dB

IscPGA

Output short circuit

current(11)

Sourcing, Vout to GND

+IN_PGA (Internal node) =

500 mV

16

mA

at the temperature

extremes

10

Sinking, Vout to VDD

+IN_PGA (Internal node) =

500 mV

12

at the temperature

extremes

8

REFERENCE INPUT

RinVREF

Input impedance(9)

500

K

Ω