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ISL8013AEVAL2Z Datasheet(PDF) 12 Page - Renesas Technology Corp

Part # ISL8013AEVAL2Z
Description  3A Low Quiescent Current 1MHz High Efficiency Synchronous Buck Regulator
PDF  18 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL8013AEVAL2Z Datasheet(HTML) 12 Page - Renesas Technology Corp

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ISL8013A
FN7526 Rev 2.01
Page 12 of 17
Dec 3, 2021
Theory of Operation
The ISL8013A is a step-down switching regulator optimized for
battery-powered handheld applications. The regulator operates at
1MHz fixed switching frequency under heavy load conditions to
allow smaller external inductors and capacitors to be used for
minimal printed-circuit board (PCB) area. At light load, the regulator
reduces the switching frequency, unless forced to the fixed
frequency, to minimize the switching loss and to maximize the
battery life. The quiescent current, when the output is not loaded, is
typically only 35µA. The supply current is typically only 0.1µA when
the regulator is shut down.
PWM Control Scheme
Pulling the SYNCH pin HI (>2.5V) forces the converter into PWM
mode, regardless of output current. The ISL8013A employs the
current-mode pulse-width modulation (PWM) control scheme for
fast transient response and pulse-by-pulse current limiting. Figure 2
shows the block diagram. The current loop consists of the oscillator,
the PWM comparator, current sensing circuit and the slope
compensation for the current loop stability. The gain for the current
sensing circuit is typically 250mV/A. The control reference for the
current loops comes from the error amplifier's (EAMP) output.
The PWM operation is initialized by the clock from the oscillator.
The P-Channel MOSFET is turned on at the beginning of a PWM
cycle and the current in the MOSFET starts to ramp up. When the
sum of the current amplifier CSA and the slope compensation
(237mV/µs) reaches the control reference of the current loop, the
PWM comparator COMP sends a signal to the PWM logic to turn
off the P-MOSFET and turn on the N-Channel MOSFET. The
N-MOSFET stays on until the end of the PWM cycle. Figure 35
shows the typical operating waveforms during the PWM operation.
The dotted lines illustrate the sum of the slope compensation
ramp and the current-sense amplifier’s CSA output.
The output voltage is regulated by controlling the VEAMP voltage
to the current loop. The bandgap circuit outputs a 0.8V reference
voltage to the voltage loop. The feedback signal comes from the
VFB pin. The soft-start block only affects the operation during the
start-up and will be discussed separately. The error amplifier is a
transconductance amplifier that converts the voltage error signal
to a current output. The voltage loop is internally compensated
with the 27pF and 390kΩ RC network. The maximum EAMP
voltage output is precisely clamped to 1.6V.
FIGURE 32. OUTPUT SHORT-CIRCUIT
FIGURE 33. OUTPUT SHORT-CIRCUIT RECOVERY
FIGURE 34. OUTPUT CURRENT LIMIT vs TEMPERATURE
Typical Operating Performance Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 2.5V to 5.5V, EN = VIN,
SYNCH = 0V, L = 1.5µH, C1 = 2x22µF, C2 = 2x22µF, IOUT = 0A to 3A. (Continued)
PHASE 2V/DIV
VOUT 0.5V/DIV
IL 2A/DIV
PG 5V/DIV
LX 2V/DIV
VOUT 1V/DIV
IL 2A/DIV
PG 5V/DIV
4.000
4.125
4.250
4.375
4.500
4.625
4.750
4.875
5.000
-50
-25
0
255075
100
TEMPERATURE (°C)
OCP_3.3VIN
OCP_5VIN



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