Getting to Know the Hardware

KTMPC5744DBUG Rev. 1.0 2/2015

Freescale Semiconductor, Inc.

11

3.4.5

Reset Circuit

In the safety applications, the RESET pin of the MCU is controlled directly by the MC33907_8. The debugger must have a full control over

the RESET pin, for debugging purposes. Reset signals coming from the JTAG and Nexus debug interfaces are connected directly to the

reset of the MC33907_8, and this common signal ("RESET_PWSBC_B") is connected to the functional reset of the MCU. This means any

of the three signals can cause a functional reset of the MCU (see Figure 4 for details).

Figure 4. Reset Circuit

3.5

Interfacing with the Mother Board

3.5.1

Power Supplies

Power supply (power management) for the daughter board is completely provided by the mother board. Consequently, the mother board

must be configured in a compatible way.

Caution:

Incorrect configuration of power supplies can damage the MCU.

The flexibility of the MC33907_8 power management circuit provides more possible configurations in how to interface with the MPC5744P.

Two of them are described with the following.

1. The first configuration provides directly 1.2 V from the MC33907_8 to the VDD_LV_XX (for the cores and the PLL). In this

configuration, the external ballast populated on the daughter board is not used. This provides a more efficient solution, 1.2 V

will be provided directly from the DC-DC and not from an LDO (power is saved normally dissipated by the external ballast

transistor). Configuration is described in Table 7.

2. In the second case, the reference voltage for the ADC is configured to 5.0 V. The rest of the circuits are supplied from the

VCORE which is configured to provide 3.3 V. All the low voltage power supplies (VDD_LV_xx) are supplied from external

ballast providing 1.2 V from the VCORE (see Table 8).