DLPC3430 datasheet(36/58 Pages) TI2

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DLPA2000

DLPS043B – JUNE 2014 – REVISED FEBRUARY 2018

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7.5.14 Interrupt Mask Register

Figure 29. Interrupt Mask Register, Address = 0Dh, HEX = DF

INT MASK [111:104]

R/W

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset.

Table 24. Interrupt Mask Register Field Descriptions

BIT

FIELD

TYPE

RESET

DESCRIPTION

111

INT MASK

R/W

VLED BUCK_BOOST

Overvoltage fault interrupt mask

0 – Interrupt is not masked

1 – Interrupt is masked

110

R/W

IREG_PG_FAULT_MASK

0 – Interrupt is not masked

1 – Interrupt is masked

109

R/W

PROJ_ON interrupt mask

0 – Interrupt is not masked

1 – Interrupt is masked

108

R/W

DMD_REGULATOR fault mask

0 – Interrupt is not masked

1 – Interrupt is masked

107

R/W

UVLO_MASK

0 – Interrupt is not masked

1 – Interrupt is masked

106

R/W

Low battery warning mask (sensed at VINA pin)

0 – Interrupt is not masked

1 – Interrupt is masked

105

R/W

Thermal shutdown interrupt mask

0 – Interrupt is not masked

1 – Interrupt is masked

104

R/W

Thermal warning interrupt mask

0 – Interrupt is not masked

1 – Interrupt is masked

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