STAMP0 datasheet(19/62 Pages) STMICROELECTRONICS

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STAMP0

Architecture

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4.3.2

PDM interface channel mapping

The internal channels PDMxa, PDMxb must be mapped properly, otherwise the

recombination algorithm will not work and the output will lead to unexpected results.

When the recombination function is not active, the two channels will be mapped to the

serial output interface as they are.

When the recombination function is active:

•

ODD channels (CH1, CH3, and CH5) will contain the recombination signal.

•

EVEN channels (CH2, CH4 and CH6) will contain the signal coming from one

membrane (user selectable)

4.3.3

Interrupts and masking

In the STAMP0 device four types of interrupt events are generated:

•

PLL unlocked

•

FSY and SCK integrity failure (FSY/SCK differ from 64, 128, 256)

•

Upper limit (UL) reached at the output of each channel

•

Stuck at PDM

Each interrupt event pulls the INTLINE pin low unless the interrupt event is masked.

The upper limit and stuck PDM events can be masked using dedicated bits in the I²C

registers (Reg. 0x28, Reg. 0x29 and Reg. 0x2A). However the unlocked PLL and FSY/SCK

events cannot be masked.

Whenever an interrupt event occurs, the respective interrupt flag (I²C bit in the register

Reg. 0x24, Reg. 0x25, Reg. 0x26 and Reg. 0x27) is set to 1 and remains at 1 (even after

the interrupt condition ends), until it is cleared (overwritten with 0) via I²C. If an interrupt flag

is cleared while the interrupt condition persists, it remains at (or reverts to) 1, and the

INTLINE remains low unless the respective interrupt event is masked.

Masking an interrupt event does not affect the interrupt flags register, but masking only

affects the INTLINE pin.

4.3.4

Microphone failure detection

PDM stuck

In order to detect if a PDM is stuck at high/low, a fixed number of PDM samples defined as

Stuck At Window (SAW) are monitored. The size of a SAW is fixed to Fs. If all the PDM

values in N consecutive SAWs (where N= [1:15] can be configured through the I²C Reg.

0x23 bit B3, B2, B1 and B0) are equal to 1/0, a microphone failure is detected and an

interrupt is generated.

Channel level detection (RMS)

In order to detect a high level limit at the output of each channel, the architecture depicted

in Figure 9: "High-level detection architecture" has been implemented in the STAMP0

device.

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