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DP83867IRPAPR Datasheet(PDF) 8 Page - Texas Instruments |
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DP83867IRPAPR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 139 page  Table 5-1. Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME HTQFP VQFN LED INTERFACE LED_2 61 45 S, I/O, PD LED_2: By default, this pin indicates receive or transmit activity. Additional functionality is configurable via LEDCR1[11:8] register bits. NOTE: This pin is a Strap Configuration pin for RGZ devices only. LED_1 62 46 S, I/O, PD LED_1: By default, this pin indicates that 1000BASE-T link is established. Additional functionality is configurable via LEDCR1[7:4] register bits. LED_0 63 47 S, I/O, PD LED_0: By default, this pin indicates that link is established. Additional functionality is configurable via LEDCR1[3:0] register bits. MEDIA DEPENDENT INTERFACE TD_P_A 2 1 A Differential Transmit and Receive Signals TD_M_A 3 2 A Differential Transmit and Receive Signals TD_P_B 5 4 A Differential Transmit and Receive Signals TD_M_B 6 5 A Differential Transmit and Receive Signals TD_P_C 10 7 A Differential Transmit and Receive Signals TD_M_C 11 8 A Differential Transmit and Receive Signals TD_P_D 13 10 A Differential Transmit and Receive Signals TD_M_D 14 11 A Differential Transmit and Receive Signals OTHER PINS Reserved 1, 7, 9, 16 A Reserved RBIAS 15 12 A Bias Resistor Connection. A 11kΩ +/-1% resistor can be connected from RBIAS to GND. POWER AND GROUND PINS VDDIO 23, 41, 57 19, 30, 41 P I/O Power: 1.8V (±5%), 2.5V (±5%) or 3.3V (±5%). Each pin requires a 1µF & 0.1µF capacitor to GND VDDA1P8 17, 64 13, 48 P 1.8V Analog Supply (+/-5%). No external supply is required for this pin. When unused, no connections can be made to this pin. For additional power savings, an external 1.8V supply can be connected to these pins. When using an external supply, each pin requires a 1µF & 0.1µF capacitor to GND. VDDA2P5 4, 12 3, 9 P 2.5V Analog Supply (+/-5%). Each pin requires a 1µF & 0.1µF capacitor to GND VDD1P1 8, 29, 42, 58 P 1.1V Analog Supply (+/-5%). Each pin requires a 1µF & 0.1µF capacitor to GND VDD1P0 6, 24, 31, 42 P 1.0V Analog Supply (+15.5%,-5%). Each pin requires a 1µF & 0.1µF capacitor to GND GND Die Attach Pad Die Attach Pad P Ground (1) The functionality of the pins are defined below. • Type I: Input • Type O: Output • Type I/O: Input /Output • Type PD or PU: Internal Pull-down or Pull-up • Type S: Strap Configuration Pin • Type: A Analog pins DP83867IR, DP83867CR SNLS484I – FEBRUARY 2015 – REVISED JANUARY 2025 www.ti.com 8 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867IR DP83867CR |
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