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TDA7391LVPDUTR Datasheet(PDF) 8 Page - STMicroelectronics |
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TDA7391LVPDUTR Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 23 page ![]() Pins description TDA7391LV 8/23 DocID023014 Rev 3 5, 7 2, 19 OUTPUTS The output stage is a bridge type able to drive loads as low as 3.2 Ω. It consists of two class AB fully complementary PNP/NPN stages fully protected. A rail to rail output voltage swing is achieved without need of bootstrap capacitors. No external compensation is necessary. 6 1, 10, 11, 20 GND Power ground. 12 S-GND Signal ground. 8 4 STANDBY The device features a standby function which shuts down all the internal bias supplies when the standby pin is low. In standby mode the amplifier sinks a small current (in the range of few μA). When the standby pin is high the IC becomes fully operational. 10 8 SYNC A resistor (R2) between pin 8 and GND set the charging current of capacitor C3 (pin 9). The suggested values of C3 and R2 define the correct timing in order to switch on/off the amplifier without any pop noise. 11 9 MUTE The pin is connected to a capacitor (C3) tied to GND to set the mute/standby time. An automatic mute during turn on/off is provided to prevent noisy transients. Table 2. Pins function (continued) Multiwatt 11 Pin # PowerSO-20 Pin # Name Description |
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