AFE10004RGETEP datasheet(39/159 Pages) TI2

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6.3.5.2.1 EEPROM Integrity Check

Before completing the EEPROM load sequence, a CRC error-check is performed by the device. The CRC

polynomial is x12 + x11 + x3 + x2 + x + 1. The CRC check result is reported through the EECRC bit. If a CRC

error is detected, the operating memory values are compromised; reset the device or burn the EEPROM again

for proper operation.

For added robustness, a single error correction and double error detection (SECDED) circuit based on the

Hamming code is added to data in the LUT pages (Page 4 and Page 5). The SECDED circuit uses four

Hamming code bits and a parity bit. The interleaved Hamming and LUT data are stored in EEPROM, and Table

6-10 shows these bits.

Table 6-10. Hamming Code and LUT Data Bits

DATA AND BIT POSITION

Data and Hamming code bits in operating

memory

Data and Hamming code interleaved bits

The SECDED circuit checks the data integrity on every LUT register access. The parity bit (P) and four Hamming

code bits (H[3:0]) in the HAMM registers equal all zeros if no error is present in the associated LUT data register.

If P = 1 then a single error has been detected and corrected. The value in the H[3:0] bits represents the position

of the bit error with respect to the interleaved bits. For example, if P = 1 and H[3:0] = 0x5, an error is detected

and corrected in D1.

If P = 0 and H[3:0] ≠ 0, then a double error has been detected. No correction is done in this case.

Table 6-11 summarizes the device EEPROM integrity checks.

Table 6-11. Status of EEPROM Access

STATUS BIT NAME

DESCRIPTION

EECRC

0 = No CRC error detected.

1 = A CRC error is detected during a EEPROM load. The operating

memory data are compromised.

EERDY

0 = The EEPROM burn is in progress.

1 = The EEPROM burn is complete.

DED

0 = No double-bit error detected.

1 = A double-bit error is detected when accessing a LUT register in the

operating memory. The error is not corrected.

SED

0 = No single-bit error detected.

1 = A single-bit error is detected when accessing a LUT register in the

operating memory. The error is corrected.

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AFE10004-EP

SLASFM1A – JUNE 2025 – REVISED DECEMBER 2025

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