AFE10004RGETEP datasheet(53/159 Pages) TI2

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Table 7-2. I2C Page 2: DAC Configuration Register Map

ADDR

(HEX)

TYPE

FACTORY

(HEX)

BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM)

DAC0[12:8]

DAC0 (high byte)

DAC0[7:0]

DAC0 (low byte)

DAC1[12:8]

DAC1 (high byte)

DAC1[7:0]

DAC1 (low byte)

DAC2[12:8]

DAC2 (high byte)

DAC2[7:0]

DAC2 (low byte)

DAC3[12:8]

DAC3 (high byte)

DAC3[7:0]

DAC3 (low byte)

R/W

DAC0OW[12:8]

DAC0 overwrite (high byte)

R/W

DAC0OW[7:0]

DAC0 overwrite (low byte)

R/W

DAC1OW[12:8]

DAC1 overwrite (high byte)

R/W

DAC1OW[7:0]

DAC1 overwrite (low byte)

R/W

DAC2OW[12:8]

DAC2 overwrite (high byte)

R/W

DAC2OW[7:0]

DAC2 overwrite (low byte)

R/W

DAC3OW[12:8]

DAC3 overwrite (high byte)

R/W

DAC3OW[7:0]

DAC3 overwrite (low byte)

R/W

CLM1OW[12:8]

CLAMP1 overwrite (high byte)

R/W

CLM1OW[7:0]

CLAMP1 overwrite (low byte)

R/W

CLM2OW[12:8]

CLAMP2 overwrite (high byte)

R/W

CLM2OW[7:0]

CLAMP2 overwrite (low byte)

CLM1[12:8]

CLAMP1 (high byte)

CLM1[7:0]

CLAMP1 (low byte)

CLM2[12:8]

CLAMP2 (high byte)

CLM2[7:0]

CLAMP2 (low byte)

DAC0LUT[12:8]

DAC0 LUT (high byte)

DAC0LUT[7:0]

DAC0 LUT (low byte)

DAC1LUT[12:8]

DAC1 LUT (high byte)

DAC1LUT[7:0]

DAC1 LUT (low byte)

DAC2LUT[12:8]

DAC2 LUT (high byte)

DAC2LUT[7:0]

DAC2 LUT (low byte)

DAC3LUT[12:8]

DAC3 LUT (high byte)

DAC3LUT[7:0]

DAC3 LUT (low byte)

R/W

BRDCST[12:8]

Broadcast (high byte)

R/W

BRDCST[7:0]

Broadcast (low byte)

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AFE10004-EP

SLASFM1A – JUNE 2025 – REVISED DECEMBER 2025

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