PRELIMINARY
CYP15G0401TB
Document #: 38-02112 Rev. **
Page 15 of 30
Maximum Ratings
(Above which the useful life may be impaired. User guidelines
only, not tested.)
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with Power Applied....–55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +3.8V
DC Voltage Applied to LVTTL Outputs
in High-Z State .......................................–0.5V to VCC + 0.5V
Output Current into LVTTL Outputs (LOW)..................60 mA
DC Input Voltage ....................................–0.5V to VCC + 0.5V
Static Discharge Voltage.......................................... > 2000 V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Power-up Requirements
The CYP15G0401TB requires one power-supply. The Voltage
on any input or I/O pin cannot exceed the power pin during
power-up
Operating Range
Range
Ambient Temperature
VCC
Commercial
0°C to +70°C
+3.3V
±5%
Industrial
–40°C to +85°C
+3.3V
±5%
CYP15G0401TB DC Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max.
Unit
LVTTL-compatible Outputs
VOHT
Output HIGH Voltage
IOH = −4 mA, VCC = Min.
2.4
VCC
V
VOLT
Output LOW Voltage
IOL = 4 mA, VCC = Min.
0
0.4
V
IOST
Output Short Circuit Current
VOUT = 0V
[9]
–20
–100
mA
IOZL
High-Z Output Leakage Current
–20
20
µA
LVTTL-compatible Inputs
VIHT
Input HIGH Voltage
2.0
VCC + 0.3
V
VILT
Input LOW Voltage
–0.5
0.8
V
IIHT
Input HIGH Current
REFCLK Input, VIN = VCC
1.5
mA
Other Inputs, VIN = VCC
+40
µA
IILT
Input LOW Current
REFCLK Input, VIN = 0.0V
–1.5
mA
Other Inputs, VIN = 0.0V
–40
µA
IIHPDT
Input HIGH Current with internal pull-down VIN = VCC
+200
µA
IILPUT
Input LOW Current with internal pull-up
VIN = 0.0V
–200
µA
LVDIFF Inputs: REFCLK
±
VDIFF
[10]
Input Differential Voltage
400
VCC
mV
VIHHP
Highest Input HIGH Voltage
1.2
VCC
V
VILLP
Lowest Input LOW voltage
0.0
VCC/2
V
VCOMREF
[11]
Common Mode Range
1.0
VCC – 1.2V
V
Three-level Inputs
VIHH
Three-level Input HIGH Voltage
Min.
≤ V
CC ≤ Max.
0.87 * VCC
VCC
V
VIMM
Three-level Input MID Voltage
Min.
≤ V
CC ≤ Max.
0.47 * VCC 0.53 * VCC
V
VILL
Three-level Input LOW Voltage
Min.
≤ V
CC ≤ Max.
0.0
0.13 * VCC
V
IIHH
Input HIGH Current
VIN = VCC
200
µA
IIMM
Input MID current
VIN = VCC/2
–50
50
µA
IILL
Input LOW current
VIN = GND
–200
µA
Differential CML Serial Outputs: OUTA1
±, OUTA2±, OUTB1±, OUTB2±, OUTC1±, OUTC2±, OUTD1±, OUTD2±
VOHC
Output HIGH Voltage
(VCC referenced)
100
Ω differential load
VCC – 0.5
VCC – 0.2
V
150
Ω differential load
VCC – 0.5
VCC – 0.2
V
Notes:
9. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.
10. This is the minimum difference in voltage between the true and complement inputs required to ensure detection of a logic-1 or logic-0. A logic-1 exists when the
true (+) input is more positive than the complement (
−) input. A logic-0 exists when the complement (−) input is more positive than true (+) input.
11. The common mode range defines the allowable range of REFCLK+ and REFCLK
− when REFCLK+ = REFCLK−. This marks the zero-crossing between the true
and complement inputs as the signal switches between a logic-1 and a logic-0.
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
