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ST7FLCD1 Datasheet(PDF) 52 Page - STMicroelectronics

Part # ST7FLCD1
Description  8-bit MCU for LCD Monitors with 60 KBytes Flash,2 KBytes RAM, 2 DDC Ports and Infrared Controller
PDF  95 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7FLCD1 Datasheet(HTML) 52 Page - STMicroelectronics

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I²C Single-Master Bus Interface
ST7FLCD1
52/95
10
I²C Single-Master Bus Interface
10.1
Introduction
The I²C Bus Interface serves as an interface between the microcontroller and the serial I²C bus. It
provides single-master functions, and controls all I²C bus-specific sequencing, protocol and timing.
It supports Fast I²C mode (400 kHz) and up to 800 kHz for certain applications.
10.2
Main Features
● Parallel / I²C bus protocol converter
● Interrupt generation
● Standard I²C mode/Fast I²C mode (up to 800 kHz for certain applications)
● 7-bit Addressing
I²C Single Master Mode
● End of byte transmission flag
● Transmitter /Receiver flag
● Clock generation
10.3
General Description
In addition to receiving and transmitting data, this interface converts data from serial to parallel
format and vice versa, using either an interrupt or a polled handshake. The interrupts are enabled or
disabled by software. The interface is connected to the I²C bus by a data pin (SDAI) and by a clock
pin (SCLI). It can be connected both with a standard I²C bus and a Fast I²C bus. This selection is
made by software.
Mode Selection
The interface can operate in the two following modes:
1. Master transmitter/receiver,
2. Idle (default).
The interface automatically switches from Idle to Master mode after it generates a START condition
and from Master to Idle mode after it generates a STOP condition.
Communication Flow
The interface initiates a data transfer and generates the clock signal. A serial data transfer always
begins with a start condition and ends with a stop condition. Both start and stop conditions are
generated by software.
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte following the start
condition is the address byte.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must send
an acknowledge bit to the transmitter. Refer to Figure 28.
Acknowledge is enabled and disabled by software.
The speed of the I²C interface is selected as Standard (0 to 100 kHz) and Fast I²C (100 to 400 kHz)
and up to 800 kHz for certain applications.



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