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ESP32-P4 Datasheet(PDF) 64 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32-P4 Datasheet(HTML) 64 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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64 / 93 page  4 Functional Description For LP UART, the pins used can be chosen from any LP GPIOs via the LP GPIO Matrix. By default, the pins connected to transmit and receive signals (LP_UART_TXD_PAD and LP_UART_RXD_PAD) are multiplexed with LP_GPIO14–LP_GPIO15 via LP IO MUX. 4.2.2.2 SPI Controller (SPI) The Serial Peripheral Interface (SPI) is a synchronous serial interface commonly used for communicating with external peripherals. The ESP32-P4 chip integrates four SPI controllers: • MSPI controller, including two sub-controllers – FLASH MSPI controller * FLASH MSPI SPI0 * FLASH MSPI SPI1 – PSRAM MSPI controller * PSRAM MSPI SPI0 * PSRAM MSPI SPI1 • General Purpose SPI2 (GP-SPI2) • General Purpose SPI3 (GP-SPI3) • Low-Power SPI (LP-SPI) Feature List GP-SPI has the following features: • Works as master or as slave • Half- and full-duplex communications • CPU- and DMA-controlled transfers • Various data modes – GP-SPI2 * 1-bit SPI mode * 2-bit Dual SPI mode * 4-bit Quad SPI mode * QPI mode * 8-bit Octal SPI mode (available only when GP-SPI2 works as a master) * OPI mode (available only when GP-SPI2 works as a master) – GP-SPI3 * 1-bit SPI mode * 2-bit Dual SPI mode * 4-bit Quad SPI mode Espressif Systems 64 Submit Documentation Feedback ESP32-P4 Series Datasheet v0.5 |
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