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OMAP3530 Datasheet(PDF) 17 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 17 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
safe_mode
7
U3
NA
gpmc_nbe1
0
O
L
L
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpio_61
4
IO
safe_mode
7
H1
AB10
gpmc_nwp
0
O
L
0
0
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpio_62
4
IO
safe_mode
7
M8
AB12
gpmc_wait0
0
I
H
H
0
VDDS_ MEM
Yes
NA
PU/
LVCMOS
PD
L8
AC10
gpmc_wait1
0
I
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpio_63
4
IO
safe_mode
7
K8
NA
gpmc_wait2
0
I
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpio_64
4
IO
safe_mode
7
J8
NA
gpmc_wait3
0
I
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
sys_
1
I
ndmareq1
gpio_65
4
IO
safe_mode
7
D28
NA
dss_pclk
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_66
4
IO
safe_mode
7
D26
NA
dss_hsync
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_67
4
IO
safe_mode
7
D27
NA
dss_vsync
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_68
4
IO
safe_mode
7
E27
NA
dss_acbias
0
O
L
L
7
VDDS
Yes
8
PU/
LVCMOS
PD
gpio_69
4
IO
safe_mode
7
AG22
NA
dss_data0
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
uart1_cts
2
I
gpio_70
4
IO
safe_mode
7
AH22
NA
dss_data1
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
uart1_rts
2
O
gpio_71
4
IO
safe_mode
7
AG23
NA
dss_data2
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
gpio_72
4
IO
safe_mode
7
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TERMINAL DESCRIPTION
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