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QST104 Datasheet(PDF) 12 Page - STMicroelectronics |
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QST104 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 45 page ![]() Device operating modes QST104 12/45 ● Deep Sleep mode In Deep Sleep mode, the device enters a very low power mode indefinitely. The device resumes its operations after receiving an I2C frame with any address or a reset. Caution: If an I2C frame is received while in Sleep or Deep Sleep mode, the device wakes up but does not acknowledge the frame (even if it has an I2C frame with the device address). The host must therefore send again the frame until it is taken in account and acknowledged. 4.4 Mode selection The device options are configured by connecting pull-up or pull-down resistors on OPTn pins. The device operating mode is selected using option pin 1 (OPT1) while the device settings are configured using option pins OPT2 to OPT6 (Table 3). Option pins are sampled at power-up and after a reset. To fit most applications, the QST104 device offers two different operating modes: ● Stand-alone mode This mode allows the user to simply replace existing mechanical switches with a capacitive sensing solution. It is designed for maximum flexibility and can accommodate most popular sensing requirements via option resistors (AKS, Low power, Max On-Duration and output modes). In this mode, the 4 output pins reflect the status of the 4 sensing channels. ● I2C mode In this mode, which is the most open one, the device is driven using the I2C interface. To avoid polling, the QST device features an output interrupt pin (IRQ). The IRQ line reports all key changes to the Master device. The QST (Slave) device can drive up to 13 general-purpose outputs. 4.5 Stand-alone mode This mode allows the user to simply replace existing mechanical switch interface with a capacitive sensing solution. It is designed for maximum flexibility and can accommodate most popular sensing requirements via option resistors (see Figure 3). 4.5.1 Main features ● Pins KOUT1 to KOUT4 directly reflect the state of keys ● Selectable global adjacent key suppression (AKS™) ● Selectable sleep duration ● Selectable Max On-Duration values ● Selectable BCD mode Table 3. Operating modes OPT1: Mode selection Option resistor function OPT2 OPT3 OPT4 OPT5 OPT6 Pin OPT1 is high at start-up Stand-alone mode AKS LP MOD_0 MOD_1 OM Pin OPT1 is low at start-up I2C mode ADD0 ADD1 ADD2 Unused Unused |
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