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QST104 Datasheet(PDF) 23 Page - STMicroelectronics |
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QST104 Datasheet(HTML) 23 Page - STMicroelectronics |
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23 / 45 page ![]() QST104 Device operating modes 23/45 Key activation description Key activation (Bit 7) 0: Key enabled 1: Key disabled Key identifier (Bits 3:0) 0000: All keys 0011: Key 3 0001: Key 1 0100: Key 4 0010: Key 2 Low power mode description Free Run in Detect (Bit 6) 0: Low Power mode is always enabled, whatever the state of the keys. 1: Low Power mode is automatically suspended when any key is in Detect state. Low Power mode is automatically resumed when no key is in Detect state. Sleep Duration Factor (Bits 5 to 0) 0x00 or 0x20 to 0x3E: Low power mode is disabled. 0x01 to 0x19: Low Power mode. The sleep duration is ‘Sleep Duration Factor’ x 20 milliseconds (20 ms to 500 ms) 0x3F: Deep Sleep mode is entered immediately. Only a reset or an I2C frame with the correct device address allows exiting Deep Sleep mode. Note: 1 When the device is in Sleep or Deep Sleep, any I2C bus activity will wake-up the device. 2The I2C QST device address is not acknowledged but forces the QST device to exit from Low Power mode. The Master device will have to repeat the command to ensure that it is taken in account. Table 14. KeyActivation Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Key Activation 0 0 0 Key ID (binary coded) Table 15. SetLowPower Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Free Run in Detect Sleep Duration Factor |
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