AS3715 datasheet(28/159 Pages) AMSOSRAM

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[v1-03] 2015-Aug-10

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AS3715 − Detailed Description – Power Management Functions

Analog LDO Regulators

Description

LDO1 and LDO2 are designed to supply sensitive analog circuits

like LNA’s, Transceivers, VCO’s and other critical RF components

of cellular radios. Another application is the supply of audio

devices or as a reference for AD and DA converters. The design

is optimized to deliver the best compromise between quiescent

current and regulator performance for battery powered

devices.

Stability is guaranteed with ceramic output capacitors of 1μF

±20% (X5R) or 2.2μF +100/-50% (Z5U). The low ESR of these caps

ensures low output impedance at high frequencies. Regulation

performance is excellent even under low dropout conditions,

when the power transistor has to operate in linear mode. Power

supply rejection is high enough to suppress the PA-ripple on

the battery in TDMA systems at the output. The low noise

performance allows direct connection of noise sensitive circuits

without additional filtering networks. The low impedance of the

power device enables the device to deliver up to IOUT current

even at nearly discharged batteries without any decrease of

performance.

The default guaranteed operating current during start-up is

150mA, but can be set to 250mA with ldoX_ilimit = 1.

To save power in low-power states where the full performance

is not needed the bias current can be reduce by setting

reg_low_bias_mode = 1.

Figure 27:

Analog IO LDO Block Diagram

Analog IO LDO Block Diagram: Shows the internal structure of the analog PMOS linear regulators.

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