R5F56517FDFM datasheet(11/188 Pages) RENESAS

11 / 188 page

RX65N Group, RX651 Group

1. Overview

R01DS0276EJ0240 Rev.2.40

Page 11 of 188

Oct 31, 2023

Note 1. Magic PacketTM is a registered trademark of Advanced Micro Devices, Inc.

Note 2. The product part number differs according to whether or not the MCU includes the encryption function.

Note 3. The product part number differs according to whether or not the MCU includes an SDHI (SD host interface)/SDSI (SD slave

interface) (products with 1 Mbyte of code flash memory or less).

Note 4. When the realtime clock is not used, initialize the registers in the time clock according to description in section 31.6.7,

Initialization Procedure When the Realtime Clock is Not to be Used in the User’s Manual: Hardware.

Note 5. Please contact us if you are using a G-version product.

Note 6. The low CL crystal unit cannot be used when the VBATT voltage is less than 2.0 V.

Safety

Clock frequency

accuracy measurement

circuit (CAC)

 Monitors the clock output from the main clock oscillator, sub-clock oscillator, low- and

high-speed on-chip oscillators, IWDT-dedicated on-chip oscillator, and PCLKB, and

generates interrupts when the setting range is exceeded.

Data operation circuit

(DOC)

 The function to compare, add, or subtract 16-bit data

Encryption

function

AESa*2

 Key lengths: 128, 192, and 256 bits

 Support for CFB, OFB, and CMAC operating modes

 Speed of calculations:

128-bit key length in 22 cycles

192-bit key length in 26 cycles

256-bit key length in 30 cycles

 Compliant with FIPS PUB 197

True random number

generator (RNG)*2

 Length of random numbers: 16 bits

 Generation of random-number-generated interrupts after a number is generated

 Random number generation time: 1.9 ms (typ)

Trusted Secure IP

(TSIP)*2

 Security algorithm

Common key encryption: AES (compliant with NIST FIPS PUB 197), 3DES, ARC4

Non-common key encryption: RSA

 Other features

TRNG (true-random number generator)

Hash value generation: SHA1, SHA224, SHA256, GHASH

Prevention from illicit copying of a key

Operating frequency

Up to 120 MHz

Power supply voltage

VCC = AVCC0 = AVCC1 = VCC_USB = 2.7 to 3.6 V, 2.7

 VREFH0  AVCC0,

VBATT = 1.62 to 3.6 V*6

Operating temperature

D-version: –40 to +85°C

G-version: –40 to +105°C*5

Package

177-pin TFLGA (PTLG0177KA-A)

176-pin LFBGA (PLBG0176GA-A)

176-pin LFQFP (PLQP0176KB-A)

145-pin TFLGA (PTLG0145KA-A)

144-pin LFQFP (PLQP0144KA-B)

100-pin TFLGA (PTLG0100JA-A)

100-pin LFQFP (PLQP0100KB-B)

64-pin TFBGA (PTBG0064KB-A)

64-pin LFQFP (PLQP0064KB-C)

Debugging interface

JTAG and FINE interfaces

Table 1.1

Outline of Specifications (10/10)

Classification

Module/Function

Description

R5F56517FDFM Datasheet(PDF) 11 Page - Renesas Technology Corp

R5F56517FDFM Datasheet(HTML) 11 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL