MK50H25DIP datasheet(11/64 Pages) STMICROELECTRONICS

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scriptor ring in a ”look ahead” manner.

If the

frame is too long for one buffer, the next buffer

will be used after filling the first buffer; that is,

”chained”. The MK50H25 will then ”look ahead”

to the next buffer, and chain that buffer if neces-

sary, and so on.The operational parameters for

the buffer management are defined by the user in

the initialization block. The parameters defined

include the basic mode of operation, the number

of entries for the transmitter and receiver descrip-

tor rings, frame Address field, etc. The starting

address for the Initialization block, IADR, is de-

fined in the CSR2 and CSR3 registers inside the

MK50H25.

3.2.3 Frame Format

The frame format supported by the MK50H25 is

shown below. Each frame may consist of a pro-

grammable number of leading flag patterns

(01111110), an address field, a control field, an

information field, an FCS (CRC) of either 16 or 32

bits, and a trailing flag pattern. The number of

leading

flags

transmitted

programmable

through the Mode Register in the Initialization

Block. Received frames may have as few as one

flag between adjacent frames

TRANSMITTED FIRST

3.2.4 The Command/Response Repertoire

The

command/response

repertoire

the

MK50H25 is shown in Tables A and B. This set

conforms to the 1984 & 1988 CCITT X.25, plus

support of XID, Test, and UI frames conforming to

ISDN LAPD. The MK50H25 will process the In-

formation, Supervisory, and Unnumbered frames

shown in Tables A and B, and will handle the A

and C fields for all I and UI frames.

The symbols and definitions for the frame types

are:

Name

Definition

Information frame

Unnumbered Information frame

Receiver Ready

RNR

Receiver Not Ready

REJ

Reject

FRMR

Frame Reject

Unnumbered Acknowledge

SABM

Set Asynchronous Balance Mode

DISC

Disconnect

Disconnect Mode

TEST

Link Test Frame

XID

Exchange Identification

INFO

8/16

8*n

FCS

16/32

MK50H25

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