MK50H25DIP datasheet(28/64 Pages) STMICROELECTRONICS

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depending on FCSS, but no

check is performed

determine

whether the FCS is correct. If the received frame has no FCS, then the

FCSEN bit (in IADR+16) should be set so that MCNT will reflect the

correct length of the received frame.

DTFCS

Disable Transmitter FCS. When DTFCS=0, the transmitter will generate

and append the FCS to each signal unit. When DTFCS = 1, the FCS

logic is disabled, and no FCS is generated with transmitted frames.

Setting DTFCS = 1 is useful in loopback testing for checking the ability

of the receiver to detect an incorrect FCS.

FCSS

FCS Select. When FCSS = 1, a 16-bit FCS is selected otherwise a 32-

bit FCS is used.

02:00

LBACK

Loopback Control puts MK50H25 into one of several loopback

configurations.

(Note: If RTSEN (CSR5<04>) = 1, then RTS (pin 26)

must be connected to CTS (pin 30) for proper loopback operation.)

4.2.2 Station Addresses

The MK50H25 uses the values in Local and Remote Station Address fields of the Initialization Block for

filtering received frames and for the address field of transmitted frames. The MK50H25 transmits com-

mands with the Remote Station Address in the frame address field, and it transmits responses with the

Local Station Address in the frame address field. The MK50H25 compares the received frame address to

the Local and Remote Station Address fields. If the received frame address matches the Local Station

Address field the MK50H25 will treat the received frame as a command. If the received frame address

matches the Remote Station Address field the MK50H25 will treat the received frame as a response. The

MK50H25 also supports the reception of frames with a global address of all 1’s, if the XIDE bit

(CSR2<08>) is set =1. In this case, it will treat a frame received with a global address as a comand,

whether or not it is an XID/TEST frame. The MK50H25 however, will transmit a frame with a global ad-

dress if all 1’s have been placed in the appropriate Local/Remote Address fields prior to an Init primitive

(UPRIM=2, CSR1) being issued.

LBACK

DESCRIPTION

Normal operation. No loopback.

Simple loopback. Receive data and clock are driven internally

by transmit data and clock. Transmit clock must be supplied

externally

Clockless loopback. Receive data is driven internally by

transmit data. Transmit and receive clocks are driven by

SYSCLK divided by 8.

Silent loopback. Same as simple loopback with td pin forced to

all ones.

Silent clockless loopback. Combination of Silent and Clockless

loopbacks. Receive data is driven internally by transmit data,

transmit and receive clocks are driven by SYSCLK divided by

8. The TD pin is forced to all ones.

MK50H25

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