14 / 37 page
IMAGE SENSOR SOLUTIONS
AC Clock Level Conditions
SYMBOL
DESCRIPTION
Level
Min.
NOM.
MAX.
UNITS
PIN IMPEDANCE2
φV1
Vertical CCD Clock
Low
-10.0
-9.5
-9.0
V
25nF, >1.2M
Ω
Mid
0.0
0.2
0.4
V
High
8.5
9.0
9.5
V
φV2
Vertical CCD Clock
Low
-10.0
-9.5
-9.0
V
25nF, >1.2M
Ω
High
0.0
0.2
0.4
V
φH1A
φ1 Horizontal CCD A Clock
Low
-7.5
-7.0
-6.5
V
100pF, > 1.2M
Ω
High
2.5
3.0
3.5
V
φH1B4
φ1 Horizontal CCD B Clock
Low
-7.5
-7.0
-6.5
V
100pF, > 1.2M
Ω
(single register mode)
φH1B4
φ1 Horizontal CCD B Clock
Low
-7.5
-7.0
-6.5
V
100pF, > 1.2M
Ω
(dual register mode)
High
2.5
3.0
3.5
V
φH2
φ2 Horizontal CCD Clock
Low
-7.5
-7.0
-6.5
V
125pF, > 1.2M
Ω
High
2.5
3.0
3.5
V
φR
Reset Clock
Low
-6.5
-6.0
-5.5
V
5pF, > 1.2M
Ω
High
-0.5
0.0
0.5
V
φFDG3
Fast Dump Gate Clock
Low
-7.0
-6.0
-5.5
V
20pF, > 1.2M
Ω
High
4.5
5.0
5.5
V
Table 4 AC Clock Level Conditions
Notes: 1. The AC and DC operating levels are for room temperature operation. Operation at other
temperatures may or may not require adjustments of these voltages.
2. Pins shown with impedances greater than 1.2 Mohm are expected resistances. These pins are only
verified to 1.2 Mohm.
3. When not used, refer to DC operating condition.
4. For single register mode, set
φH1B to -7.0 volts at all times rather than clocking it.
This device is suitable for a wide range of applications requiring a variety of different operating conditions. Consult Eastman
Kodak in those situations in which operating conditions meet or exceed minimum or maximum levels.
KAI-1010/1011 Rev 8 •
www.k odak.com/go/imagers 585-722- 4385 imagers@kodak.com
14
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
