74LVC1G79

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 12 — 5 December 2016

8 of 21

NXP Semiconductors

74LVC1G79

Single D-type flip-flop; positive-edge trigger

[1]

Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.

[2]

tpd is the same as tPLH and tPHL.

[3]

CPD is used to determine the dynamic power dissipation (PD in W).

PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

(C

L  VCC

2

 f

o) = sum of outputs.

th

hold time

D to CP; see Figure 9

VCC = 1.65 V to 1.95 V

0

0.7

-

0

-

ns

VCC = 2.3 V to 2.7 V

0

0.4

-

0

-

ns

VCC = 2.7 V

+0.5

0.3

-

0.5

-

ns

VCC = 3.0 V to 3.6 V

+0.5

0.3

-

0.5

-

ns

VCC = 4.5 V to 5.5 V

+0.5

0.2

-

0.5

-

ns

tW

pulse width

CP HIGH or LOW;

see Figure 9

VCC = 1.65 V to 1.95 V

3.0

1.1

-

3.0

-

ns

VCC = 2.3 V to 2.7 V

2.5

0.7

-

2.5

-

ns

VCC = 2.7 V

2.5

0.6

-

2.5

-

ns

VCC = 3.0 V to 3.6 V

2.5

0.6

-

2.5

-

ns

VCC = 4.5 V to 5.5 V

2.0

0.5

-

2.0

-

ns

fmax

maximum

frequency

CP; see Figure 9

VCC = 1.65 V to 1.95 V

160

250

-

160

-

MHz

VCC = 2.3 V to 2.7 V

160

300

-

160

-

MHz

VCC = 2.7 V

160

350

-

160

-

MHz

VCC = 3.0 V to 3.6 V

160

450

-

160

-

MHz

VCC = 4.5 V to 5.5 V

200

500

-

200

-

MHz

CPD

power dissipation

capacitance

VI = GND to VCC;

VCC = 3.3 V

[3]

-

17

---

pF

Table 8.

Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.

Symbol Parameter

Conditions

40 C to +85 C

40 C to +125 C Unit

Min

Typ[1]

Max

Min

Max