| Electronic Components Datasheet Search |
|
NRF52811-QCAA-R7 Datasheet(PDF) 53 Page - Nordic Semiconductor |
|
|
|||||||||||||||||||||||||||||
NRF52811-QCAA-R7 Datasheet(HTML) 53 Page - Nordic Semiconductor |
|
53 / 444 page ![]() Power and clock management The debug access port (DAP) is not reset following a wake up from System OFF mode if the device is in Debug Interface mode. See chapter Debug on page 38 for more information. 5.3.6.4 Soft reset A soft reset is generated when the SYSRESETREQ bit of the Application Interrupt and Reset Control Register (AIRCR register) in the ARM® core is set. Refer to ARM documentation for more details. A soft reset can also be generated via the RESET on page 39 register in the CTRL-AP. 5.3.6.5 Watchdog reset A Watchdog reset is generated when the watchdog times out. See chapter WDT — Watchdog timer on page 410 for more information. 5.3.6.6 Brown-out reset The brown-out reset generator puts the system in reset state if the supply voltage drops below the brownout reset (BOR) threshold. Refer to section Power fail comparator on page 61 for more information. 5.3.7 Retained registers A retained register is a register that will retain its value in System OFF mode and through a reset, depending on reset source. See individual peripheral chapters for information of which registers are retained for the various peripherals. 5.3.8 Reset behavior Reset target Reset source CPU Peripherals GPIO Debuga SWJ-DP RAM WDT Retained registers RESETREAS CPU lockup 5 x x x Soft reset x x x Wakeup from System OFF mode reset x x x 6 x 7 Watchdog reset 8 x x x x x x x Pin reset x x x x x x x Brownout reset x x x x x x x x x Power on reset x x x x x x x x x Note: The RAM is never reset, but depending on reset source, RAM content may be corrupted. a All debug components excluding SWJ-DP. See Debug on page 38 chapter for more information about the different debug components in the system. 5 Reset from CPU lockup is disabled if the device is in debug interface mode. CPU lockup is not possible in System OFF. 6 The Debug components will not be reset if the device is in debug interface mode. 7 RAM is not reset on wakeup from OFF mode, but depending on settings in the RAM register parts, or the whole RAM, may not be retained after the device has entered System OFF mode. 8 Watchdog reset is not available in System OFF. 4454_140 v1.0 53 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |